| /freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 154 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
245 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion() local
384 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp() local
498 Register AddrReg = MI.getOperand(2).getReg(); in expandAtomicCmpXchg() local
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| H A D | LoongArchExpandPseudoInsts.cpp | 614 Register AddrReg = IsTailCall ? LoongArch::R19 : LoongArch::R1; expandFunctionCALL() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
114 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 267 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
332 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion() local
473 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp() local
637 Register AddrReg = MI.getOperand(2).getReg(); in expandAtomicCmpXchg() local
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| H A D | RISCVAsmPrinter.cpp | 319 const MachineOperand &AddrReg = MI->getOperand(OpNo); PrintAsmMemoryOperand() local
471 Register AddrReg = MI.getOperand(0).getReg(); LowerKCFI_CHECK() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
178 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 179 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
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| H A D | PPCInstructionSelector.cpp | 750 Register AddrReg = I.getOperand(1).getReg(); in select() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 234 Register AddrReg = MI.getOperand(2).getReg(); expandCMP_SWAP() local
314 Register AddrReg = MI.getOperand(3).getReg(); expandCMP_SWAP_128() local
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| H A D | AArch64SIMDInstrOpt.cpp | 508 unsigned SeqReg, AddrReg; in optimizeLdStInterleave() local
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| H A D | AArch64FastISel.cpp | 2055 emitStoreRelease(MVT VT,unsigned SrcReg,unsigned AddrReg,MachineMemOperand * MMO) emitStoreRelease() argument
2195 Register AddrReg = getRegForValue(PtrV); selectStore() local
2514 Register AddrReg = getRegForValue(BI->getOperand(0)); selectIndirectBr() local
5059 const Register AddrReg = constrainOperandRegClass( selectAtomicCmpXchg() local
[all...] |
| H A D | AArch64AsmPrinter.cpp | 445 Register AddrReg = MI.getOperand(0).getReg(); LowerKCFI_CHECK() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
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| H A D | X86InstructionSelector.cpp | 1505 Register AddrReg = MRI.createVirtualRegister(&X86::GR64RegClass); materializeFP() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 106 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
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| H A D | ARMExpandPseudoInsts.cpp | 1805 Register AddrReg = MI.getOperand(2).getReg(); ExpandCMP_SWAP() local
1935 Register AddrReg = MI.getOperand(2).getReg(); ExpandCMP_SWAP_64() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 147 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); getStackAddress() local
269 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 121 const MachineOperand *AddrReg[MaxAddressRegs]; member
1296 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair() local
1199 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); mergeRead2Pair() local
[all...] |
| H A D | R600InstrInfo.cpp | 1099 unsigned AddrReg; buildIndirectWrite() local
1131 unsigned AddrReg; buildIndirectRead() local
[all...] |
| H A D | AMDGPUCallLowering.cpp | 114 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 79 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 1160 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
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| H A D | X86MCInstLower.cpp | 887 const Register AddrReg = MI.getOperand(0).getReg(); LowerKCFI_CHECK() local
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