Searched defs:AddMI (Results 1 – 7 of 7) sorted by relevance
| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCShuffler.cpp | 55 void HexagonMCShuffler::init(MCInst &MCB, MCInst const &AddMI, in init()
181 MCInst const &AddMI, int fixupCount) { in HexagonMCShuffle()
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| H A D | HexagonMCShuffler.h | 40 MCInst &MCB, MCInst const &AddMI, bool InsertAtFront) in HexagonMCShuffler()
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 398 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP() local
435 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP() local
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| H A D | AArch64InstrInfo.cpp | 6932 MachineInstr *AddMI = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); genSubAdd2SubSub() local
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| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 377 combineRestoreADD(MachineBasicBlock::iterator RestoreMI,MachineBasicBlock::iterator AddMI,const TargetInstrInfo * TII) combineRestoreADD() argument
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 418 processAddUses(NodeAddr<StmtNode * > AddSN,MachineInstr * AddMI,const NodeList & UNodeList) processAddUses() argument
492 updateAddUses(MachineInstr * AddMI,MachineInstr * UseMI) updateAddUses() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2141 const MachineInstr *AddMI = canCombine(MBB, Root.getOperand(2), RISCV::ADD); getSHXADDPatterns() local
2276 MachineInstr *AddMI = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); genShXAddAddShift() local
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