xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/tonga_smumgr.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: tonga_smumgr.h,v 1.2 2021/12/18 23:45:27 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2015 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef _TONGA_SMUMGR_H_
27 #define _TONGA_SMUMGR_H_
28 
29 #include "smu72_discrete.h"
30 #include "smu7_smumgr.h"
31 #include "smu72.h"
32 
33 
34 #define ASICID_IS_TONGA_P(wDID, bRID)	 \
35 	(((wDID == 0x6930) && ((bRID == 0xF0) || (bRID == 0xF1) || (bRID == 0xFF))) \
36 	|| ((wDID == 0x6920) && ((bRID == 0) || (bRID == 1))))
37 
38 struct tonga_pt_defaults {
39 	uint8_t   svi_load_line_en;
40 	uint8_t   svi_load_line_vddC;
41 	uint8_t   tdc_vddc_throttle_release_limit_perc;
42 	uint8_t   tdc_mawt;
43 	uint8_t   tdc_waterfall_ctl;
44 	uint8_t   dte_ambient_temp_base;
45 	uint32_t  display_cac;
46 	uint32_t  bapm_temp_gradient;
47 	uint16_t  bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
48 	uint16_t  bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
49 };
50 
51 struct tonga_mc_reg_entry {
52 	uint32_t mclk_max;
53 	uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
54 };
55 
56 struct tonga_mc_reg_table {
57 	uint8_t   last;               /* number of registers*/
58 	uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
59 	uint16_t  validflag;          /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
60 	struct tonga_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
61 	SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
62 };
63 
64 
65 struct tonga_smumgr {
66 
67 	struct smu7_smumgr                   smu7_data;
68 	struct SMU72_Discrete_DpmTable       smc_state_table;
69 	struct SMU72_Discrete_Ulv            ulv_setting;
70 	struct SMU72_Discrete_PmFuses  power_tune_table;
71 	const struct tonga_pt_defaults  *power_tune_defaults;
72 	SMU72_Discrete_MCRegisters      mc_regs;
73 	struct tonga_mc_reg_table mc_reg_table;
74 };
75 
76 #endif
77