1 /* $NetBSD: arcemu.h,v 1.14 2023/06/24 05:31:05 msaitoh Exp $ */
2
3 /*
4 * Copyright (c) 2004 Steve Rumble
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29 #ifndef _ARCEMU_H_
30
31 #include <sys/param.h>
32
33 #include <mips/cpuregs.h>
34
35 #include <dev/arcbios/arcbios.h>
36 #include <dev/arcbios/arcbiosvar.h>
37
38 int arcemu_init(const char **);
39
40 #ifdef _ARCEMU_PRIVATE
41
42 /* Platform identification */
43 static int arcemu_identify(void);
44
45 /* Helper functions */
46 static boolean_t extractenv(const char **, const char *, char *, int);
47
48 /*
49 * IP6, IP12 ARCS Emulation
50 */
51
52 /* Prom Emulators */
53 static void arcemu_ipN_init(const char **);
54 static void * arcemu_GetPeer(void *);
55 static void * arcemu_GetChild(void *);
56 static const char *
57 arcemu_GetEnvironmentVariable(const char *);
58 static void * arcemu_ip6_GetMemoryDescriptor(void *mem);
59 static void * arcemu_ip12_GetMemoryDescriptor(void *mem);
60
61 static void arcemu_eeprom_read(void);
62 static void arcemu_prom_putc(dev_t, int);
63
64 #define ARCEMU_ENVOK(_x) \
65 (MIPS_PHYS_TO_KSEG1((_x)) >= 0xa0000000 && \
66 MIPS_PHYS_TO_KSEG1((_x)) < 0xa0800000)
67
68 /* ARCBIOS Component Tree. Represented in linear fashion. */
69 static struct arcbios_component arcemu_component_tree[] = {
70 { COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_CPU,
71 -1, -1, -1, -1, -1, -1, -1, 0 },
72
73 /* end of list */
74 { -1, -1, -1, -1, -1, -1, -1, -1, -1, 0 }
75 };
76
77 /* Unimplemented Vector */
78 #define ARCEMU_UNIMPL ((int32_t)(intptr_t)arcemu_unimpl)
79 static void arcemu_unimpl(void);
80
81 /*
82 * EEPROM bit access functions.
83 */
84
85 static inline void
ip6_set_pre(int raise)86 ip6_set_pre(int raise)
87 {
88 if (raise)
89 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x10;
90 else
91 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x10;
92 DELAY(4);
93 }
94
95 static inline void
ip6_set_cs(int raise)96 ip6_set_cs(int raise)
97 {
98 if (raise)
99 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x20;
100 else
101 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x20;
102 DELAY(4);
103 }
104
105 static inline void
ip6_set_sk(int raise)106 ip6_set_sk(int raise)
107 {
108 if (raise)
109 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x40;
110 else
111 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x40;
112 DELAY(4);
113 }
114
115 static inline int
ip6_get_do(void)116 ip6_get_do(void)
117 {
118 DELAY(4);
119 if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f800001) & 0x01)
120 return (1);
121 return (0);
122 }
123
124 static inline void
ip6_set_di(int raise)125 ip6_set_di(int raise)
126 {
127 if (raise)
128 *(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(0x1f880002) |= 0x0100;
129 else
130 *(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(0x1f880002) &= ~0x0100;
131 DELAY(4);
132 }
133
134 static inline void
ip12_set_pre(int raise)135 ip12_set_pre(int raise)
136 {
137 if (raise)
138 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x01;
139 else
140 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x01;
141 DELAY(4);
142 }
143
144 static inline void
ip12_set_cs(int raise)145 ip12_set_cs(int raise)
146 {
147 if (raise)
148 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x02;
149 else
150 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x02;
151 DELAY(4);
152 }
153
154 static inline void
ip12_set_sk(int raise)155 ip12_set_sk(int raise)
156 {
157 if (raise)
158 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x04;
159 else
160 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x04;
161 DELAY(4);
162 }
163
164 static inline int
ip12_get_do(void)165 ip12_get_do(void)
166 {
167 DELAY(4);
168 if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) & 0x08)
169 return (1);
170 return (0);
171 }
172
173 static inline void
ip12_set_di(int raise)174 ip12_set_di(int raise)
175 {
176 if (raise)
177 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x10;
178 else
179 *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x10;
180 DELAY(4);
181 }
182
183
184 #endif /* _ARCEMU_PRIVATE */
185
186 #endif /* _ARCEMU_H_ */
187