/openbsd-src/sys/dev/pci/drm/i915/display/ |
H A D | intel_vdsc_regs.h | 31 #define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 45 #define ICL_PIPE_DSS_CTL2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 54 #define MTL_DSC0_PICTURE_PARAMETER_SET_17(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 57 #define MTL_DSC1_PICTURE_PARAMETER_SET_17(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 66 #define MTL_DSC0_PICTURE_PARAMETER_SET_18(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 69 #define MTL_DSC1_PICTURE_PARAMETER_SET_18(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 82 #define ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 85 #define ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 106 #define ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument 109 #define ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument [all …]
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H A D | skl_watermark_regs.h | 13 #define PIPE_MBUS_DBOX_CTL(pipe) _MMIO_PIPE(pipe, _PIPEA_MBUS_DBOX_CTL, \ argument 41 #define MBUS_JOIN_PIPE_SELECT(pipe) REG_FIELD_PREP(MBUS_JOIN_PIPE_SELECT_MASK, pipe) argument 74 #define _CUR_WM_0(pipe) _PIPE(pipe, _CUR_WM_A_0, _CUR_WM_B_0) argument 75 #define CUR_WM(pipe, level) _MMIO(_CUR_WM_0(pipe) + ((4) * (level))) argument 76 #define CUR_WM_SAGV(pipe) _MMIO_PIPE(pipe, _CUR_WM_SAGV_A, _CUR_WM_SAGV_B) argument 77 #define CUR_WM_SAGV_TRANS(pipe) _MMIO_PIPE(pipe, _CUR_WM_SAGV_TRANS_A, _CUR_WM_SAGV_TRANS_B) argument 78 #define CUR_WM_TRANS(pipe) _MMIO_PIPE(pipe, _CUR_WM_TRANS_A, _CUR_WM_TRANS_B) argument 79 #define _PLANE_WM_1(pipe) _PIPE(pipe, _PLANE_WM_1_A_0, _PLANE_WM_1_B_0) argument 80 #define _PLANE_WM_2(pipe) _PIPE(pipe, _PLANE_WM_2_A_0, _PLANE_WM_2_B_0) argument 81 #define _PLANE_WM_BASE(pipe, plane) \ argument [all …]
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H A D | intel_dsb_regs.h | 13 #define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \ argument 15 #define DSB_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0) argument 16 #define DSB_TAIL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4) argument 17 #define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8) argument 25 #define DSB_MMIOCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xc) argument 31 #define DSB_POLLFUNC(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x10) argument 37 #define DSB_DEBUG(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x14) argument 38 #define DSB_POLLMASK(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x1c) argument 39 #define DSB_STATUS(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x24) argument 40 #define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x28) argument [all …]
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H A D | intel_display_irq.c | 26 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe) in intel_handle_vblank() 108 enum pipe pipe, u32 interrupt_mask, in bdw_update_pipe_irq() 132 enum pipe pipe, u32 bits) in bdw_enable_pipe_irq() 138 enum pipe pipe, u32 bits) in bdw_disable_pipe_irq() 180 enum pipe pipe) in i915_pipestat_enable_mask() 224 enum pipe pipe, u32 status_mask) in i915_enable_pipestat() 247 enum pipe pipe, u32 status_mask) in i915_disable_pipestat() 298 enum pipe pipe, in display_pipe_crc_irq_handler() 333 enum pipe pipe, in display_pipe_crc_irq_handler() 340 enum pipe pipe) in flip_done_handler() [all …]
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H A D | intel_fdi.c | 23 enum pipe pipe, bool state) in assert_fdi_tx() 44 void assert_fdi_tx_enabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_tx_enabled() 49 void assert_fdi_tx_disabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_tx_disabled() 55 enum pipe pipe, bool state) in assert_fdi_rx() 65 void assert_fdi_rx_enabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_rx_enabled() 70 void assert_fdi_rx_disabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_rx_disabled() 76 enum pipe pipe) in assert_fdi_tx_pll_enabled() 94 enum pipe pipe, bool state) in assert_fdi_rx_pll() 104 void assert_fdi_rx_pll_enabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_rx_pll_enabled() 109 void assert_fdi_rx_pll_disabled(struct drm_i915_private *i915, enum pipe pipe) in assert_fdi_rx_pll_disabled() [all …]
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H A D | intel_audio_regs.h | 20 #define IBX_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _IBX_HDMIW_HDMIEDID_A, \ argument 24 #define IBX_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CNTL_ST_A, \ argument 35 #define CPT_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _CPT_HDMIW_HDMIEDID_A, _CPT_HDMIW_HDMIEDID_B) argument 38 #define CPT_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CNTL_ST_A, _CPT_AUD_CNTL_ST_B) argument 43 #define VLV_HDMIW_HDMIEDID(pipe) _MMIO_PIPE(pipe, _VLV_HDMIW_HDMIEDID_A, _VLV_HDMIW_HDMIEDID_B) argument 46 #define VLV_AUD_CNTL_ST(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CNTL_ST_A, _VLV_AUD_CNTL_ST_B) argument 51 #define IBX_AUD_CFG(pipe) _MMIO_PIPE(pipe, _IBX_AUD_CONFIG_A, _IBX_AUD_CONFIG_B) argument 54 #define CPT_AUD_CFG(pipe) _MMIO_PIPE(pipe, _CPT_AUD_CONFIG_A, _CPT_AUD_CONFIG_B) argument 57 #define VLV_AUD_CFG(pipe) _MMIO_PIPE(pipe, _VLV_AUD_CONFIG_A, _VLV_AUD_CONFIG_B) argument 137 #define HBLANK_EARLY_ENABLE_ICL(pipe) (0x1 << (20 - (pipe))) argument [all …]
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H A D | intel_pch_display.c | 38 enum pipe pipe, enum port port, in assert_pch_dp_disabled() 57 enum pipe pipe, enum port port, in assert_pch_hdmi_disabled() 76 enum pipe pipe) in assert_pch_ports_disabled() 101 enum pipe pipe) in assert_pch_transcoder_disabled() 178 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_set_m1_n1() local 189 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_set_m2_n2() local 200 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_get_m1_n1() local 211 enum pipe pipe = crtc->pipe; in intel_pch_transcoder_get_m2_n2() local 246 enum pipe pipe = crtc->pipe; in ilk_enable_pch_transcoder() local 312 enum pipe pipe = crtc->pipe; in ilk_disable_pch_transcoder() local [all …]
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H A D | intel_fifo_underrun.c | 62 enum pipe pipe; in ivb_can_enable_err_int() local 79 enum pipe pipe; in cpt_can_enable_serr_int() local 114 enum pipe pipe, in i9xx_set_fifo_underrun_reporting() 136 enum pipe pipe, bool enable) in ilk_set_fifo_underrun_reporting() 151 enum pipe pipe = crtc->pipe; in ivb_check_fifo_underruns() local 167 enum pipe pipe, bool enable, in ivb_set_fifo_underrun_reporting() 205 enum pipe pipe, bool enable) in bdw_set_fifo_underrun_reporting() 282 enum pipe pipe, bool enable) in __intel_set_cpu_fifo_underrun_reporting() 322 enum pipe pipe, bool enable) in intel_set_cpu_fifo_underrun_reporting() 395 enum pipe pipe) in intel_cpu_fifo_underrun_irq_handler()
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H A D | intel_pipe_crc.c | 76 enum pipe pipe, in i9xx_pipe_crc_auto_source() 126 enum pipe pipe, in vlv_pipe_crc_ctl_reg() 193 enum pipe pipe, in i9xx_pipe_crc_ctl_reg() 230 enum pipe pipe) in vlv_undo_pipe_scramble_reset() 331 enum pipe pipe, in ivb_pipe_crc_ctl_reg() 359 enum pipe pipe, in skl_pipe_crc_ctl_reg() 402 enum pipe pipe, in get_new_crc_ctl_reg() 583 enum pipe pipe = crtc->pipe; in intel_crtc_set_crc_source() local 634 enum pipe pipe = crtc->pipe; in intel_crtc_enable_pipe_crc() local 654 enum pipe pipe = crtc->pipe; in intel_crtc_disable_pipe_crc() local
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H A D | intel_display_reg_defs.h | 18 #define _PIPE(pipe, a, b) _PICK_EVEN(pipe, a, b) argument 25 #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b)) argument 32 #define _MMIO_PIPE3(pipe, a, b, c) _MMIO(_PICK_EVEN_2RANGES(pipe, 1, a, a, b, c)) argument 33 #define _MMIO_PORT3(pipe, a, b, c) _MMIO(_PICK_EVEN_2RANGES(pipe, 1, a, a, b, c)) argument 39 #define _MMIO_PIPE2(pipe, reg) _MMIO(DISPLAY_INFO(dev_priv)->pipe_offsets[(pipe)] - \ argument 45 #define _MMIO_CURSOR2(pipe, reg) _MMIO(DISPLAY_INFO(dev_priv)->cursor_offsets[(pipe)] - \ argument
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H A D | intel_sprite.c | 138 enum pipe pipe = plane->pipe; in vlv_sprite_update_clrc() local 341 enum pipe pipe = plane->pipe; in vlv_sprite_update_gamma() local 365 enum pipe pipe = plane->pipe; in vlv_sprite_update_noarm() local 386 enum pipe pipe = plane->pipe; in vlv_sprite_update_arm() local 434 enum pipe pipe = plane->pipe; in vlv_sprite_disable_arm() local 443 enum pipe *pipe) in vlv_sprite_get_hw_state() 749 enum pipe pipe = plane->pipe; in ivb_sprite_update_gamma() local 780 enum pipe pipe = plane->pipe; in ivb_sprite_update_noarm() local 810 enum pipe pipe = plane->pipe; in ivb_sprite_update_arm() local 856 enum pipe pipe = plane->pipe; in ivb_sprite_disable_arm() local [all …]
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H A D | intel_fdi_regs.h | 28 #define FDI_RX_CHICKEN(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN) argument 33 #define FDI_TX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_TXA_CTL, _FDI_TXB_CTL) argument 83 #define FDI_RX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL) argument 119 #define FDI_RX_MISC(pipe) _MMIO_PIPE(pipe, _FDI_RXA_MISC, _FDI_RXB_MISC) argument 125 #define FDI_RX_TUSIZE1(pipe) _MMIO_PIPE(pipe, _FDI_RXA_TUSIZE1, _FDI_RXB_TUSIZE1) argument 126 #define FDI_RX_TUSIZE2(pipe) _MMIO_PIPE(pipe, _FDI_RXA_TUSIZE2, _FDI_RXB_TUSIZE2) argument 145 #define FDI_RX_IIR(pipe) _MMIO_PIPE(pipe, _FDI_RXA_IIR, _FDI_RXB_IIR) argument 146 #define FDI_RX_IMR(pipe) _MMIO_PIPE(pipe, _FDI_RXA_IMR, _FDI_RXB_IMR) argument
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H A D | skl_universal_plane.c | 520 enum pipe pipe = plane->pipe; in icl_program_input_csc() local 624 enum pipe pipe = plane->pipe; skl_plane_disable_arm() local 638 enum pipe pipe = plane->pipe; icl_plane_disable_arm() local 652 skl_plane_get_hw_state(struct intel_plane * plane,enum pipe * pipe) skl_plane_get_hw_state() argument 1084 enum pipe pipe = plane->pipe; icl_plane_csc_load_black() local 1120 enum pipe pipe = plane->pipe; skl_plane_update_noarm() local 1150 enum pipe pipe = plane->pipe; skl_plane_update_arm() local 1206 enum pipe pipe = plane->pipe; icl_plane_update_noarm() local 1281 enum pipe pipe = plane->pipe; icl_plane_update_arm() local 1318 enum pipe pipe = plane->pipe; skl_plane_async_flip() local 1940 skl_fbc_id_for_pipe(enum pipe pipe) skl_fbc_id_for_pipe() argument 1955 skl_plane_fbc(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id) skl_plane_fbc() argument 1966 skl_plane_has_planar(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id) skl_plane_has_planar() argument 1982 skl_get_plane_formats(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id,int * num_formats) skl_get_plane_formats() argument 1995 glk_get_plane_formats(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id,int * num_formats) glk_get_plane_formats() argument 2008 icl_get_plane_formats(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id,int * num_formats) icl_get_plane_formats() argument 2151 enum pipe pipe = plane->pipe; skl_plane_enable_flip_done() local 2162 enum pipe pipe = plane->pipe; skl_plane_disable_flip_done() local 2170 skl_plane_has_rc_ccs(struct drm_i915_private * i915,enum pipe pipe,enum plane_id plane_id) skl_plane_has_rc_ccs() argument 2215 skl_get_plane_caps(struct drm_i915_private * i915,enum pipe pipe,enum plane_id plane_id) skl_get_plane_caps() argument 2240 skl_universal_plane_create(struct drm_i915_private * dev_priv,enum pipe pipe,enum plane_id plane_id) skl_universal_plane_create() argument 2397 enum pipe pipe; skl_get_initial_plane_config() local [all...] |
H A D | intel_dpio_phy.c | 669 enum dpio_channel vlv_pipe_to_channel(enum pipe pipe) in vlv_pipe_to_channel() 692 enum pipe pipe = crtc->pipe; in chv_set_phy_signal_level() local 787 enum pipe pipe = crtc->pipe; in chv_data_lane_soft_reset() local 832 enum pipe pipe = crtc->pipe; in chv_phy_pre_pll_enable() local 913 enum pipe pipe = crtc->pipe; in chv_phy_pre_encoder_enable() local 1000 enum pipe pipe = to_intel_crtc(old_crtc_state->uapi.crtc)->pipe; in chv_phy_post_pll_disable() local 1039 enum pipe pipe = crtc->pipe; in vlv_set_phy_signal_level() local 1066 enum pipe pipe = crtc->pipe; in vlv_phy_pre_pll_enable() local 1096 enum pipe pipe = crtc->pipe; in vlv_phy_pre_encoder_enable() local 1125 enum pipe pipe = crtc->pipe; in vlv_phy_reset_lanes() local
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H A D | intel_color.c | 206 enum pipe pipe = crtc->pipe; in ilk_update_pipe_csc() local 239 enum pipe pipe = crtc->pipe; in ilk_read_pipe_csc() local 305 enum pipe pipe = crtc->pipe; in icl_update_output_csc() local 335 enum pipe pipe = crtc->pipe; in icl_read_output_csc() local 612 enum pipe pipe = crtc->pipe; in vlv_load_wgc_csc() local 634 enum pipe pipe = crtc->pipe; in vlv_read_wgc_csc() local 714 enum pipe pipe = crtc->pipe; in chv_load_cgm_csc() local 732 enum pipe pipe = crtc->pipe; in chv_read_cgm_csc() local 1020 enum pipe pipe = crtc->pipe; in skl_color_commit_arm() local 1048 enum pipe pipe = crtc->pipe; in icl_color_commit_arm() local [all …]
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/openbsd-src/sys/sys/ |
H A D | pipe.h | 80 struct pipe { struct 81 struct rwlock *pipe_lock; argument 82 struct pipebuf pipe_buffer; /* [p] data storage */ argument 83 struct klist pipe_klist; /* [p] list of knotes */ argument 84 struct timespec pipe_atime; /* [p] time of last access */ argument 85 struct timespec pipe_mtime; /* [p] time of last modify */ argument 86 struct timespec pipe_ctime; /* [I] time of status change */ argument 87 struct sigio_ref pipe_sigio; /* [S] async I/O registration */ argument 88 struct pipe *pipe_peer; /* [p] link with other direction */ argument 89 struct pipe_pair *pipe_pair; /* [I] pipe storage */ argument [all …]
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/openbsd-src/sys/dev/pci/drm/ |
H A D | drm_vblank.c | 169 static void store_vblank(struct drm_device *dev, unsigned int pipe, in store_vblank() 185 static u32 drm_max_vblank_count(struct drm_device *dev, unsigned int pipe) in drm_max_vblank_count() 196 static u32 drm_vblank_no_hw_counter(struct drm_device *dev, unsigned int pipe) in drm_vblank_no_hw_counter() 202 static u32 __get_vblank_counter(struct drm_device *dev, unsigned int pipe) in __get_vblank_counter() 231 static void drm_reset_vblank_timestamp(struct drm_device *dev, unsigned int pipe) in drm_reset_vblank_timestamp() 278 static void drm_update_vblank_count(struct drm_device *dev, unsigned int pipe, in drm_update_vblank_count() 370 u64 drm_vblank_count(struct drm_device *dev, unsigned int pipe) in drm_vblank_count() 406 unsigned int pipe = drm_crtc_index(crtc); in drm_crtc_accurate_vblank_count() local 425 static void __disable_vblank(struct drm_device *dev, unsigned int pipe) in __disable_vblank() 449 void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe) in drm_vblank_disable_and_save() [all …]
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/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_resource_helpers.c | 129 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp() local 174 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_all_pipes_have_stream_and_plane() local 191 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_in_use() local 216 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_any_surfaces_rotated() local 227 bool dcn32_is_center_timing(struct pipe_ctx *pipe) in dcn32_is_center_timing() 248 bool dcn32_is_psr_capable(struct pipe_ctx *pipe) in dcn32_is_psr_capable() 356 struct pipe_ctx *pipe; in dcn32_set_det_allocations() local 414 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_save_mall_state() local 442 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_restore_mall_state() local 607 bool dcn32_check_native_scaling_for_res(struct pipe_ctx *pipe, unsigned int width, unsigned int hei… in dcn32_check_native_scaling_for_res() [all …]
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/openbsd-src/sys/dev/pci/drm/i915/ |
H A D | vlv_sideband_reg.h | 49 #define _DP_SSC(val, pipe) ((val) << (2 * (pipe))) argument 50 #define DP_SSC_MASK(pipe) _DP_SSC(0x3, (pipe)) argument 51 #define DP_SSC_PWR_ON(pipe) _DP_SSC(0x0, (pipe)) argument 52 #define DP_SSC_CLK_GATE(pipe) _DP_SSC(0x1, (pipe)) argument 53 #define DP_SSC_RESET(pipe) _DP_SSC(0x2, (pipe)) argument 54 #define DP_SSC_PWR_GATE(pipe) _DP_SSC(0x3, (pipe)) argument 55 #define _DP_SSS(val, pipe) ((val) << (2 * (pipe) + 16)) argument 56 #define DP_SSS_MASK(pipe) _DP_SSS(0x3, (pipe)) argument 57 #define DP_SSS_PWR_ON(pipe) _DP_SSS(0x0, (pipe)) argument 58 #define DP_SSS_CLK_GATE(pipe) _DP_SSS(0x1, (pipe)) argument [all …]
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H A D | i915_reg.h | 151 #define GEN7_PIPE_DE_LOAD_SL(pipe) _MMIO_PIPE(pipe, _GEN7_PIPEA_DE_LOAD_SL, _GEN7_PIPEB_DE_LOAD_SL) argument 198 #define DPIO_PHY(pipe) ((pipe) >> 1) argument 992 #define ERR_INT_PIPE_CRC_DONE(pipe) (1 << (2 + (pipe) * argument 994 ERR_INT_FIFO_UNDERRUN(pipe) global() argument 1415 DPLL(pipe) global() argument 1514 DPLL_MD(pipe) global() argument 1559 FP0(pipe) global() argument 1560 FP1(pipe) global() argument 1743 PALETTE(pipe,i) global() argument 1827 CLKGATE_DIS_PSL(pipe) global() argument 1834 CLKGATE_DIS_PSL_EXT(pipe) global() argument 1914 PIPE_CRC_CTL(pipe) global() argument 1915 PIPE_CRC_RES_1_IVB(pipe) global() argument 1916 PIPE_CRC_RES_2_IVB(pipe) global() argument 1917 PIPE_CRC_RES_3_IVB(pipe) global() argument 1918 PIPE_CRC_RES_4_IVB(pipe) global() argument 1919 PIPE_CRC_RES_5_IVB(pipe) global() argument 1921 PIPE_CRC_RES_RED(pipe) global() argument 1922 PIPE_CRC_RES_GREEN(pipe) global() argument 1923 PIPE_CRC_RES_BLUE(pipe) global() argument 1924 PIPE_CRC_RES_RES1_I915(pipe) global() argument 1925 PIPE_CRC_RES_RES2_G4X(pipe) global() argument 2002 PIPESRC(pipe) global() argument 2107 ADPA_PIPE_SEL(pipe) global() argument 2110 ADPA_PIPE_SEL_CPT(pipe) global() argument 2260 SDVO_PIPE_SEL(pipe) global() argument 2302 SDVO_PIPE_SEL_CPT(pipe) global() argument 2307 SDVO_PIPE_SEL_CHV(pipe) global() argument 2358 PFIT_PIPE(pipe) global() argument 2402 DP_PIPE_SEL(pipe) global() argument 2405 DP_PIPE_SEL_IVB(pipe) global() argument 2408 DP_PIPE_SEL_CHV(pipe) global() argument 2524 PIPE_DATA_M_G4X(pipe) global() argument 2525 PIPE_DATA_N_G4X(pipe) global() argument 2526 PIPE_LINK_M_G4X(pipe) global() argument 2527 PIPE_LINK_N_G4X(pipe) global() argument 2643 PIPEDSL(pipe) global() argument 2644 PIPEFRAME(pipe) global() argument 2645 PIPEFRAMEPIXEL(pipe) global() argument 2646 PIPESTAT(pipe) global() argument 2650 PIPEGCMAX(pipe,i) global() argument 2653 PIPE_ARB_CTL(pipe) global() argument 2685 PIPE_MISC(pipe) global() argument 2694 PIPE_MISC2(pipe) global() argument 2701 SKL_BOTTOM_COLOR(pipe) global() argument 2704 ICL_PIPESTATUS(pipe) global() argument 2927 VLV_DDL(pipe) global() argument 2940 CBR_DPLLBMD_PIPE(pipe) global() argument 2979 WM0_PIPE_ILK(pipe) global() argument 3034 PIPE_FRMCOUNT_G4X(pipe) global() argument 3035 PIPE_FLIPCOUNT_G4X(pipe) global() argument 3054 MCURSOR_PIPE_SEL(pipe) global() argument 3094 CURCNTR(pipe) global() argument 3095 CURBASE(pipe) global() argument 3096 CURPOS(pipe) global() argument 3097 CURSIZE(pipe) global() argument 3098 CUR_FBC_CTL(pipe) global() argument 3099 CUR_CHICKEN(pipe) global() argument 3100 CURSURFLIVE(pipe) global() argument 3124 DISP_PIPE_SEL(pipe) global() argument 3195 CHV_BLEND(pipe) global() argument 3196 CHV_CANVAS(pipe) global() argument 3327 DVSCNTR(pipe) global() argument 3328 DVSLINOFF(pipe) global() argument 3329 DVSSTRIDE(pipe) global() argument 3330 DVSPOS(pipe) global() argument 3331 DVSSURF(pipe) global() argument 3332 DVSKEYMAX(pipe) global() argument 3333 DVSSIZE(pipe) global() argument 3334 DVSSCALE(pipe) global() argument 3335 DVSTILEOFF(pipe) global() argument 3336 DVSKEYVAL(pipe) global() argument 3337 DVSKEYMSK(pipe) global() argument 3338 DVSSURFLIVE(pipe) global() argument 3339 DVSGAMC_G4X(pipe,i) global() argument 3340 DVSGAMC_ILK(pipe,i) global() argument 3341 DVSGAMCMAX_ILK(pipe,i) global() argument 3426 SPRCTL(pipe) global() argument 3427 SPRLINOFF(pipe) global() argument 3428 SPRSTRIDE(pipe) global() argument 3429 SPRPOS(pipe) global() argument 3430 SPRSIZE(pipe) global() argument 3431 SPRKEYVAL(pipe) global() argument 3432 SPRKEYMSK(pipe) global() argument 3433 SPRSURF(pipe) global() argument 3434 SPRKEYMAX(pipe) global() argument 3435 SPRTILEOFF(pipe) global() argument 3436 SPROFFSET(pipe) global() argument 3437 SPRSCALE(pipe) global() argument 3438 SPRGAMC(pipe,i) global() argument 3439 SPRGAMC16(pipe,i) global() argument 3440 SPRGAMC17(pipe,i) global() argument 3441 SPRSURFLIVE(pipe) global() argument 3524 _VLV_SPR(pipe,plane_id,reg_a,reg_b) global() argument 3526 _MMIO_VLV_SPR(pipe,plane_id,reg_a,reg_b) global() argument 3529 SPCNTR(pipe,plane_id) global() argument 3530 SPLINOFF(pipe,plane_id) global() argument 3531 SPSTRIDE(pipe,plane_id) global() argument 3532 SPPOS(pipe,plane_id) global() argument 3533 SPSIZE(pipe,plane_id) global() argument 3534 SPKEYMINVAL(pipe,plane_id) global() argument 3535 SPKEYMSK(pipe,plane_id) global() argument 3536 SPSURF(pipe,plane_id) global() argument 3537 SPKEYMAXVAL(pipe,plane_id) global() argument 3538 SPTILEOFF(pipe,plane_id) global() argument 3539 SPCONSTALPHA(pipe,plane_id) global() argument 3540 SPSURFLIVE(pipe,plane_id) global() argument 3541 SPCLRC0(pipe,plane_id) global() argument 3542 SPCLRC1(pipe,plane_id) global() argument 3543 SPGAMC(pipe,plane_id,i) global() argument 3760 _PLANE_CC_VAL_1(pipe,dw) global() argument 3761 _PLANE_CC_VAL_2(pipe,dw) global() argument 3762 PLANE_CC_VAL(pipe,plane,dw) global() argument 3772 _PLANE_INPUT_CSC_RY_GY_1(pipe) global() argument 3775 _PLANE_INPUT_CSC_RY_GY_2(pipe) global() argument 3779 PLANE_INPUT_CSC_COEFF(pipe,plane,index) global() argument 3789 _PLANE_INPUT_CSC_PREOFF_HI_1(pipe) global() argument 3792 _PLANE_INPUT_CSC_PREOFF_HI_2(pipe) global() argument 3795 PLANE_INPUT_CSC_PREOFF(pipe,plane,index) global() argument 3805 _PLANE_INPUT_CSC_POSTOFF_HI_1(pipe) global() argument 3808 _PLANE_INPUT_CSC_POSTOFF_HI_2(pipe) global() argument 3811 PLANE_INPUT_CSC_POSTOFF(pipe,plane,index) global() argument 3818 _PLANE_CTL_1(pipe) global() argument 3819 _PLANE_CTL_2(pipe) global() argument 3820 _PLANE_CTL_3(pipe) global() argument 3821 PLANE_CTL(pipe,plane) global() argument 3827 _PLANE_STRIDE_1(pipe) global() argument 3829 _PLANE_STRIDE_2(pipe) global() argument 3831 _PLANE_STRIDE_3(pipe) global() argument 3833 PLANE_STRIDE(pipe,plane) global() argument 3839 _PLANE_POS_1(pipe) global() argument 3840 _PLANE_POS_2(pipe) global() argument 3841 _PLANE_POS_3(pipe) global() argument 3842 PLANE_POS(pipe,plane) global() argument 3848 _PLANE_SIZE_1(pipe) global() argument 3849 _PLANE_SIZE_2(pipe) global() argument 3850 _PLANE_SIZE_3(pipe) global() argument 3851 PLANE_SIZE(pipe,plane) global() argument 3857 _PLANE_SURF_1(pipe) global() argument 3858 _PLANE_SURF_2(pipe) global() argument 3859 _PLANE_SURF_3(pipe) global() argument 3860 PLANE_SURF(pipe,plane) global() argument 3865 _PLANE_OFFSET_1(pipe) global() argument 3866 _PLANE_OFFSET_2(pipe) global() argument 3867 PLANE_OFFSET(pipe,plane) global() argument 3872 _PLANE_KEYVAL_1(pipe) global() argument 3873 _PLANE_KEYVAL_2(pipe) global() argument 3874 PLANE_KEYVAL(pipe,plane) global() argument 3879 _PLANE_KEYMSK_1(pipe) global() argument 3880 _PLANE_KEYMSK_2(pipe) global() argument 3881 PLANE_KEYMSK(pipe,plane) global() argument 3886 _PLANE_KEYMAX_1(pipe) global() argument 3887 _PLANE_KEYMAX_2(pipe) global() argument 3888 PLANE_KEYMAX(pipe,plane) global() argument 3893 _PLANE_SURFLIVE_1(pipe) global() argument 3894 _PLANE_SURFLIVE_2(pipe) global() argument 3895 PLANE_SURFLIVE(pipe,plane) global() argument 3900 _PLANE_CHICKEN_1(pipe) global() argument 3901 _PLANE_CHICKEN_2(pipe) global() argument 3902 PLANE_CHICKEN(pipe,plane) global() argument 3907 _PLANE_AUX_DIST_1(pipe) global() argument 3909 _PLANE_AUX_DIST_2(pipe) global() argument 3911 PLANE_AUX_DIST(pipe,plane) global() argument 3916 _PLANE_AUX_OFFSET_1(pipe) global() argument 3918 _PLANE_AUX_OFFSET_2(pipe) global() argument 3920 PLANE_AUX_OFFSET(pipe,plane) global() argument 3925 _PLANE_CUS_CTL_1(pipe) global() argument 3927 _PLANE_CUS_CTL_2(pipe) global() argument 3929 PLANE_CUS_CTL(pipe,plane) global() argument 3935 _PLANE_COLOR_CTL_1(pipe) global() argument 3937 _PLANE_COLOR_CTL_2(pipe) global() argument 3939 PLANE_COLOR_CTL(pipe,plane) global() argument 4013 PF_PIPE_SEL_IVB(pipe) global() argument 4036 PF_CTL(pipe) global() argument 4037 PF_WIN_SZ(pipe) global() argument 4038 PF_WIN_POS(pipe) global() argument 4039 PF_VSCALE(pipe) global() argument 4040 PF_HSCALE(pipe) global() argument 4182 SKL_PS_CTRL(pipe,id) global() argument 4185 SKL_PS_PWR_GATE(pipe,id) global() argument 4188 SKL_PS_WIN_POS(pipe,id) global() argument 4191 SKL_PS_WIN_SZ(pipe,id) global() argument 4194 SKL_PS_VSCALE(pipe,id) global() argument 4197 SKL_PS_HSCALE(pipe,id) global() argument 4200 SKL_PS_VPHASE(pipe,id) global() argument 4203 SKL_PS_HPHASE(pipe,id) global() argument 4206 SKL_PS_ECC_STAT(pipe,id) global() argument 4209 GLK_PS_COEF_INDEX_SET(pipe,id,set) global() argument 4213 GLK_PS_COEF_DATA_SET(pipe,id,set) global() argument 4220 LGC_PALETTE(pipe,i) global() argument 4237 PREC_PALETTE(pipe,i) global() argument 4241 PREC_PIPEGCMAX(pipe,i) global() argument 4245 GAMMA_MODE(pipe) global() argument 4283 DE_PIPE_VBLANK(pipe) global() argument 4289 DE_PIPE_CRC_DONE(pipe) global() argument 4291 DE_PIPE_FIFO_UNDERRUN(pipe) global() argument 4310 DE_PIPE_VBLANK_IVB(pipe) global() argument 4334 GEN8_DE_PIPE_IRQ(pipe) global() argument 4357 GEN8_DE_PIPE_ISR(pipe) global() argument 4358 GEN8_DE_PIPE_IMR(pipe) global() argument 4359 GEN8_DE_PIPE_IIR(pipe) global() argument 4360 GEN8_DE_PIPE_IER(pipe) global() argument 4610 CHICKEN_PIPESL_1(pipe) global() argument 4743 PIPE_CHICKEN(pipe) global() argument 4868 SERR_INT_TRANS_FIFO_UNDERRUN(pipe) global() argument 4999 TRANS_DPLLB_SEL(pipe) global() argument 5000 TRANS_DPLLA_SEL(pipe) global() argument 5001 TRANS_DPLL_ENABLE(pipe) global() argument 5046 TVIDEO_DIP_CTL(pipe) global() argument 5047 TVIDEO_DIP_DATA(pipe) global() argument 5048 TVIDEO_DIP_GCP(pipe) global() argument 5063 VLV_TVIDEO_DIP_CTL(pipe) global() argument 5066 VLV_TVIDEO_DIP_DATA(pipe) global() argument 5069 VLV_TVIDEO_DIP_GCP(pipe) global() argument 5139 PCH_TRANS_HTOTAL(pipe) global() argument 5140 PCH_TRANS_HBLANK(pipe) global() argument 5141 PCH_TRANS_HSYNC(pipe) global() argument 5142 PCH_TRANS_VTOTAL(pipe) global() argument 5143 PCH_TRANS_VBLANK(pipe) global() argument 5144 PCH_TRANS_VSYNC(pipe) global() argument 5145 PCH_TRANS_VSYNCSHIFT(pipe) global() argument 5156 PCH_TRANS_DATA_M1(pipe) global() argument 5157 PCH_TRANS_DATA_N1(pipe) global() argument 5158 PCH_TRANS_DATA_M2(pipe) global() argument 5159 PCH_TRANS_DATA_N2(pipe) global() argument 5160 PCH_TRANS_LINK_M1(pipe) global() argument 5161 PCH_TRANS_LINK_N1(pipe) global() argument 5162 PCH_TRANS_LINK_M2(pipe) global() argument 5163 PCH_TRANS_LINK_N2(pipe) global() argument 5167 PCH_TRANSCONF(pipe) global() argument 5185 TRANS_CHICKEN1(pipe) global() argument 5191 TRANS_CHICKEN2(pipe) global() argument 5212 FDI_PHASE_SYNC_OVR(pipe) global() argument 5213 FDI_PHASE_SYNC_EN(pipe) global() argument 5269 TRANS_DP_CTL(pipe) global() argument 5753 DDI_DP_COMP_CTL(pipe) global() argument 5766 DDI_DP_COMP_PAT(pipe,i) global() argument 5937 BXT_CDCLK_CD2X_PIPE(pipe) global() argument 5940 ICL_CDCLK_CD2X_PIPE(pipe) global() argument 5942 TGL_CDCLK_CD2X_PIPE(pipe) global() argument 6247 WM_LINETIME(pipe) global() argument 6308 PIPE_CSC_COEFF_RY_GY(pipe) global() argument 6309 PIPE_CSC_COEFF_BY(pipe) global() argument 6310 PIPE_CSC_COEFF_RU_GU(pipe) global() argument 6311 PIPE_CSC_COEFF_BU(pipe) global() argument 6312 PIPE_CSC_COEFF_RV_GV(pipe) global() argument 6313 PIPE_CSC_COEFF_BV(pipe) global() argument 6314 PIPE_CSC_MODE(pipe) global() argument 6315 PIPE_CSC_PREOFF_HI(pipe) global() argument 6316 PIPE_CSC_PREOFF_ME(pipe) global() argument 6317 PIPE_CSC_PREOFF_LO(pipe) global() argument 6318 PIPE_CSC_POSTOFF_HI(pipe) global() argument 6319 PIPE_CSC_POSTOFF_ME(pipe) global() argument 6320 PIPE_CSC_POSTOFF_LO(pipe) global() argument 6349 PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe) global() argument 6352 PIPE_CSC_OUTPUT_COEFF_BY(pipe) global() argument 6355 PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe) global() argument 6358 PIPE_CSC_OUTPUT_COEFF_BU(pipe) global() argument 6361 PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe) global() argument 6364 PIPE_CSC_OUTPUT_COEFF_BV(pipe) global() argument 6367 PIPE_CSC_OUTPUT_PREOFF_HI(pipe) global() argument 6370 PIPE_CSC_OUTPUT_PREOFF_ME(pipe) global() argument 6373 PIPE_CSC_OUTPUT_PREOFF_LO(pipe) global() argument 6376 PIPE_CSC_OUTPUT_POSTOFF_HI(pipe) global() argument 6379 PIPE_CSC_OUTPUT_POSTOFF_ME(pipe) global() argument 6382 PIPE_CSC_OUTPUT_POSTOFF_LO(pipe) global() argument 6408 PREC_PAL_INDEX(pipe) global() argument 6409 PREC_PAL_DATA(pipe) global() argument 6410 PREC_PAL_GC_MAX(pipe,i) global() argument 6411 PREC_PAL_EXT_GC_MAX(pipe,i) global() argument 6412 PREC_PAL_EXT2_GC_MAX(pipe,i) global() argument 6424 PRE_CSC_GAMC_INDEX(pipe) global() argument 6425 PRE_CSC_GAMC_DATA(pipe) global() argument 6438 PREC_PAL_MULTI_SEG_INDEX(pipe) global() argument 6441 PREC_PAL_MULTI_SEG_DATA(pipe) global() argument 6454 _PLANE_CSC_RY_GY_1(pipe) global() argument 6456 _PLANE_CSC_RY_GY_2(pipe) global() argument 6458 PLANE_CSC_COEFF(pipe,plane,index) global() argument 6468 _PLANE_CSC_PREOFF_HI_1(pipe) global() argument 6470 _PLANE_CSC_PREOFF_HI_2(pipe) global() argument 6472 PLANE_CSC_PREOFF(pipe,plane,index) global() argument 6482 _PLANE_CSC_POSTOFF_HI_1(pipe) global() argument 6484 _PLANE_CSC_POSTOFF_HI_2(pipe) global() argument 6486 PLANE_CSC_POSTOFF(pipe,plane,index) global() argument 6497 PIPE_WGC_C01_C00(pipe) global() argument 6498 PIPE_WGC_C02(pipe) global() argument 6499 PIPE_WGC_C11_C10(pipe) global() argument 6500 PIPE_WGC_C12(pipe) global() argument 6501 PIPE_WGC_C21_C20(pipe) global() argument 6502 PIPE_WGC_C22(pipe) global() argument 6536 CGM_PIPE_CSC_COEFF01(pipe) global() argument 6537 CGM_PIPE_CSC_COEFF23(pipe) global() argument 6538 CGM_PIPE_CSC_COEFF45(pipe) global() argument 6539 CGM_PIPE_CSC_COEFF67(pipe) global() argument 6540 CGM_PIPE_CSC_COEFF8(pipe) global() argument 6541 CGM_PIPE_DEGAMMA(pipe,i,w) global() argument 6542 CGM_PIPE_GAMMA(pipe,i,w) global() argument 6543 CGM_PIPE_MODE(pipe) global() argument 6559 PIPE_FRMTMSTMP(pipe) global() argument 6565 PIPE_FLIPTMSTMP(pipe) global() argument 6571 PIPE_FLIPDONETIMSTMP(pipe) global() argument 6575 VLV_PIPE_MSA_MISC(pipe) global() argument [all...] |
/openbsd-src/sys/dev/usb/ |
H A D | usbdi.c | 148 usbd_dump_queue(struct usbd_pipe *pipe) in usbd_dump_queue() 159 usbd_dump_pipe(struct usbd_pipe *pipe) in usbd_dump_pipe() 176 struct usbd_pipe **pipe) in usbd_open_pipe() 184 u_int8_t flags, struct usbd_pipe **pipe, int ival) in usbd_open_pipe_ival() 215 u_int8_t flags, struct usbd_pipe **pipe, void *priv, in usbd_open_pipe_intr() 254 usbd_close_pipe(struct usbd_pipe *pipe) in usbd_close_pipe() 280 struct usbd_pipe *pipe = xfer->pipe; in usbd_transfer() local 438 usbd_setup_xfer(struct usbd_xfer *xfer, struct usbd_pipe *pipe, in usbd_setup_xfer() 475 usbd_setup_isoc_xfer(struct usbd_xfer *xfer, struct usbd_pipe *pipe, in usbd_setup_isoc_xfer() 550 usbd_abort_pipe(struct usbd_pipe *pipe) in usbd_abort_pipe() [all …]
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/openbsd-src/sys/dev/pci/drm/amd/amdgpu/ |
H A D | mes_v11_0.c | 477 enum admgpu_mes_pipe pipe) in mes_v11_0_allocate_ucode_buffer() 512 enum admgpu_mes_pipe pipe) in mes_v11_0_allocate_ucode_data_buffer() 547 enum admgpu_mes_pipe pipe) in mes_v11_0_free_ucode_buffers() 561 uint32_t pipe, data = 0; in mes_v11_0_enable() local 613 enum admgpu_mes_pipe pipe, bool prime_icache) in mes_v11_0_load_microcode() 685 enum admgpu_mes_pipe pipe) in mes_v11_0_allocate_eop_buf() 896 enum admgpu_mes_pipe pipe) in mes_v11_0_queue_init() 991 enum admgpu_mes_pipe pipe) in mes_v11_0_mqd_sw_init() 1032 int pipe, r; in mes_v11_0_sw_init() local 1071 int pipe; in mes_v11_0_sw_fini() local [all …]
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H A D | mes_v10_1.c | 383 enum admgpu_mes_pipe pipe) in mes_v10_1_allocate_ucode_buffer() 416 enum admgpu_mes_pipe pipe) in mes_v10_1_allocate_ucode_data_buffer() 449 enum admgpu_mes_pipe pipe) in mes_v10_1_free_ucode_buffers() 462 uint32_t pipe, data = 0; in mes_v10_1_enable() local 512 enum admgpu_mes_pipe pipe) in mes_v10_1_load_microcode() 606 enum admgpu_mes_pipe pipe) in mes_v10_1_allocate_eop_buf() 885 enum admgpu_mes_pipe pipe) in mes_v10_1_mqd_sw_init() 925 int pipe, r; in mes_v10_1_sw_init() local 963 int pipe; in mes_v10_1_sw_fini() local 1146 int pipe, r; in mes_v10_0_early_init() local
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/openbsd-src/sys/dev/pci/drm/i915/gvt/ |
H A D | display.c | 45 int pipe = -1; in get_edp_pipe() local 74 int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe) in pipe_is_enabled() 177 int pipe; in emulate_monitor_status_change() local 622 static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe) in emulate_vblank_on_pipe() 653 int pipe; in intel_vgpu_emulate_vblank() local
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/openbsd-src/sys/dev/pci/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 330 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_helper_populate_phantom_dlg_params() local 546 struct pipe_ctx *pipe; dcn32_set_phantom_stream_timing() local 636 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_get_num_free_pipes() local 681 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_assign_subvp_pipe() local 756 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_enough_pipes_for_subvp() local 806 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; subvp_subvp_schedulable() local 870 struct pipe_ctx *pipe = NULL; subvp_drr_schedulable() local 958 struct pipe_ctx *pipe = NULL; subvp_vblank_schedulable() local 1049 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; subvp_subvp_admissable() local 1103 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; subvp_validate_static_schedulability() local 1515 struct pipe_ctx *pipe = NULL; dcn32_find_split_pipe() local 1715 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_internal_validate_bw() local 1735 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_internal_validate_bw() local 1809 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_internal_validate_bw() local 1895 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_internal_validate_bw() local 2947 dcn32_allow_subvp_with_active_margin(struct pipe_ctx * pipe) dcn32_allow_subvp_with_active_margin() argument 2990 dcn32_allow_subvp_high_refresh_rate(struct dc * dc,struct dc_state * context,struct pipe_ctx * pipe) dcn32_allow_subvp_high_refresh_rate() argument 3086 const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_assign_fpo_vactive_candidate() local 3116 const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; dcn32_find_vactive_pipe() local [all...] |