Lines Matching defs:cc
564 ctrlr->vcprop.cc.raw = 0;
565 ctrlr->vcprop.cc.bits.en = 0; /* Init controller disabled */
567 ctrlr->vcprop.cc.bits.css =
576 SPDK_DEBUGLOG(nvmf, "cc 0x%x\n", ctrlr->vcprop.cc.raw);
684 if (!ctrlr->vcprop.cc.bits.en) {
690 if (1u << ctrlr->vcprop.cc.bits.iosqes != sizeof(struct spdk_nvme_cmd)) {
692 ctrlr->vcprop.cc.bits.iosqes);
697 if (1u << ctrlr->vcprop.cc.bits.iocqes != sizeof(struct spdk_nvme_cpl)) {
699 ctrlr->vcprop.cc.bits.iocqes);
1110 /* restart cc timer */
1127 ctrlr->vcprop.cc.raw = 0;
1226 return ctrlr->vcprop.cc.raw;
1232 union spdk_nvme_cc_register cc, diff;
1235 cc.raw = value;
1237 SPDK_DEBUGLOG(nvmf, "cur CC: 0x%08x\n", ctrlr->vcprop.cc.raw);
1238 SPDK_DEBUGLOG(nvmf, "new CC: 0x%08x\n", cc.raw);
1244 diff.raw = cc.raw ^ ctrlr->vcprop.cc.raw;
1247 if (cc.bits.en) {
1251 ctrlr->vcprop.cc.bits.en = 1;
1266 ctrlr->vcprop.cc.bits.en = 0;
1278 if (cc.bits.shn == SPDK_NVME_SHN_NORMAL ||
1279 cc.bits.shn == SPDK_NVME_SHN_ABRUPT) {
1281 cc.bits.shn >> 1, cc.bits.shn & 1);
1293 ctrlr->vcprop.cc.bits.shn = cc.bits.shn;
1304 } else if (cc.bits.shn == 0) {
1305 ctrlr->vcprop.cc.bits.shn = 0;
1308 cc.bits.shn >> 1, cc.bits.shn & 1);
1316 cc.bits.iosqes, 1u << cc.bits.iosqes);
1317 ctrlr->vcprop.cc.bits.iosqes = cc.bits.iosqes;
1323 cc.bits.iocqes, 1u << cc.bits.iocqes);
1324 ctrlr->vcprop.cc.bits.iocqes = cc.bits.iocqes;
1329 SPDK_ERRLOG("Arbitration Mechanism Selected (AMS) 0x%x not supported!\n", cc.bits.ams);
1334 SPDK_ERRLOG("Memory Page Size (MPS) %u KiB not supported!\n", (1 << (2 + cc.bits.mps)));
1339 if (cc.bits.css > SPDK_NVME_CC_CSS_IOCS) {
1340 SPDK_ERRLOG("I/O Command Set Selected (CSS) 0x%x not supported!\n", cc.bits.css);
1454 PROP(cc, 4, nvmf_prop_get_cc, nvmf_prop_set_cc, NULL),
3878 if (ctrlr->vcprop.cc.bits.en != 1) {
4526 if (spdk_unlikely(ctrlr->vcprop.cc.bits.en != 1)) {