161 	pcireg_t busdata, reg, blr;  in ppbattach()  local
277 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_IOSTATUS);  in ppbattach()
278 	sc->sc_iobase = (blr & 0x000000f0) << 8;  in ppbattach()
279 	sc->sc_iolimit = (blr & 0x000f000) | 0x00000fff;  in ppbattach()
280 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_IO_HI);  in ppbattach()
281 	sc->sc_iobase |= (blr & 0x0000ffff) << 16;  in ppbattach()
282 	sc->sc_iolimit |= (blr & 0xffff0000);  in ppbattach()
295 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_MEM);  in ppbattach()
296 	sc->sc_membase = (blr & 0x0000fff0) << 16;  in ppbattach()
297 	sc->sc_memlimit = (blr & 0xfff00000) | 0x000fffff;  in ppbattach()
311 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFMEM);  in ppbattach()
312 	sc->sc_pmembase = (blr & 0x0000fff0) << 16;  in ppbattach()
313 	sc->sc_pmemlimit = (blr & 0xfff00000) | 0x000fffff;  in ppbattach()
315 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32);  in ppbattach()
316 	sc->sc_pmembase |= ((uint64_t)blr) << 32;  in ppbattach()
317 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32);  in ppbattach()
318 	sc->sc_pmemlimit |= ((uint64_t)blr) << 32;  in ppbattach()
416 	pcireg_t blr, reg;  in ppbactivate()  local
464 		blr = pci_conf_read(pc, tag, PPB_REG_IOSTATUS);  in ppbactivate()
465 		blr &= 0xffff0000;  in ppbactivate()
466 		blr |= sc->sc_iolimit & PPB_IO_MASK;  in ppbactivate()
467 		blr |= (sc->sc_iobase >> PPB_IO_SHIFT);  in ppbactivate()
468 		pci_conf_write(pc, tag, PPB_REG_IOSTATUS, blr);  in ppbactivate()
469 		blr = (sc->sc_iobase & 0xffff0000) >> 16;  in ppbactivate()
470 		blr |= sc->sc_iolimit & 0xffff0000;  in ppbactivate()
471 		pci_conf_write(pc, tag, PPB_REG_IO_HI, blr);  in ppbactivate()
474 		blr = sc->sc_memlimit & PPB_MEM_MASK;  in ppbactivate()
475 		blr |= (sc->sc_membase >> PPB_MEM_SHIFT);  in ppbactivate()
476 		pci_conf_write(pc, tag, PPB_REG_MEM, blr);  in ppbactivate()
479 		blr = sc->sc_pmemlimit & PPB_MEM_MASK;  in ppbactivate()
480 		blr |= ((sc->sc_pmembase & PPB_MEM_MASK) >> PPB_MEM_SHIFT);  in ppbactivate()
481 		pci_conf_write(pc, tag, PPB_REG_PREFMEM, blr);  in ppbactivate()
576 	pcireg_t id, busdata, blr, bhlcr, type, csr;  in ppb_alloc_resources()  local
675 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_IOSTATUS);  in ppb_alloc_resources()
676 		sc->sc_iobase = (blr << PPB_IO_SHIFT) & PPB_IO_MASK;  in ppb_alloc_resources()
677 		sc->sc_iolimit = (blr & PPB_IO_MASK) | 0x00000fff;  in ppb_alloc_resources()
678 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_IO_HI);  in ppb_alloc_resources()
679 		sc->sc_iobase |= (blr & 0x0000ffff) << 16;  in ppb_alloc_resources()
680 		sc->sc_iolimit |= (blr & 0xffff0000);  in ppb_alloc_resources()
691 				blr = pci_conf_read(pc, sc->sc_tag,  in ppb_alloc_resources()
693 				blr &= 0xffff0000;  in ppb_alloc_resources()
694 				blr |= sc->sc_iolimit & PPB_IO_MASK;  in ppb_alloc_resources()
695 				blr |= (sc->sc_iobase >> PPB_IO_SHIFT);  in ppb_alloc_resources()
697 				    PPB_REG_IOSTATUS, blr);  in ppb_alloc_resources()
698 				blr = (sc->sc_iobase & 0xffff0000) >> 16;  in ppb_alloc_resources()
699 				blr |= sc->sc_iolimit & 0xffff0000;  in ppb_alloc_resources()
701 				    PPB_REG_IO_HI, blr);  in ppb_alloc_resources()
710 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_MEM);  in ppb_alloc_resources()
711 		sc->sc_membase = (blr << PPB_MEM_SHIFT) & PPB_MEM_MASK;  in ppb_alloc_resources()
712 		sc->sc_memlimit = (blr & PPB_MEM_MASK) | 0x000fffff;  in ppb_alloc_resources()
723 				blr = sc->sc_memlimit & PPB_MEM_MASK;  in ppb_alloc_resources()
724 				blr |= (sc->sc_membase >> PPB_MEM_SHIFT);  in ppb_alloc_resources()
726 				    PPB_REG_MEM, blr);  in ppb_alloc_resources()