Lines Matching defs:rxr
635 ngbe_rxfill(struct rx_ring *rxr)
637 struct ngbe_softc *sc = rxr->sc;
641 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 0,
642 rxr->rxdma.dma_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
644 i = rxr->last_desc_filled;
645 for (slots = if_rxr_get(&rxr->rx_ring, sc->num_rx_desc); slots > 0;
650 if (ngbe_get_buf(rxr, i) != 0)
653 rxr->last_desc_filled = i;
657 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 0,
658 rxr->rxdma.dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
660 if_rxr_put(&rxr->rx_ring, slots);
669 struct rx_ring *rxr;
677 rxr = &sc->rx_rings[i];
680 ifr[n].ifr_info = rxr->rx_ring;
1051 struct rx_ring *rxr = &sc->rx_rings[i];
1056 ifiq->ifiq_softc = rxr;
1057 rxr->ifiq = ifiq;
1165 struct rx_ring *rxr;
1215 rxr = &sc->rx_rings[i];
1216 rxr->sc = sc;
1217 rxr->me = i;
1218 timeout_set(&rxr->rx_refill, ngbe_rxrefill, rxr);
1220 if (ngbe_dma_malloc(sc, rsize, &rxr->rxdma)) {
1225 rxr->rx_base = (union ngbe_rx_desc *)rxr->rxdma.dma_vaddr;
1226 bzero((void *)rxr->rx_base, rsize);
1234 nq->rxr = &sc->rx_rings[i];
1241 for (rxr = sc->rx_rings; rxconf > 0; rxr++, rxconf--)
1242 ngbe_dma_free(sc, &rxr->rxdma);
1258 struct rx_ring *rxr;
1261 for (i = 0, rxr = sc->rx_rings; i < sc->sc_nqueues; i++, rxr++)
1262 if_rxr_init(&rxr->rx_ring, 0, 0);
1264 for (i = 0, rxr = sc->rx_rings; i < sc->sc_nqueues; i++, rxr++)
1265 ngbe_free_receive_buffers(rxr);
1269 ngbe_free_receive_buffers(struct rx_ring *rxr)
1275 sc = rxr->sc;
1276 if (rxr->rx_buffers != NULL) {
1278 rxbuf = &rxr->rx_buffers[i];
1280 bus_dmamap_sync(rxr->rxdma.dma_tag, rxbuf->map,
1283 bus_dmamap_unload(rxr->rxdma.dma_tag,
1288 bus_dmamap_destroy(rxr->rxdma.dma_tag, rxbuf->map);
1291 free(rxr->rx_buffers, M_DEVBUF,
1293 rxr->rx_buffers = NULL;
1343 ngbe_allocate_receive_buffers(struct rx_ring *rxr)
1345 struct ngbe_softc *sc = rxr->sc;
1349 rxr->rx_buffers = mallocarray(sc->num_rx_desc,
1351 if (rxr->rx_buffers == NULL) {
1358 rxbuf = rxr->rx_buffers;
1360 error = bus_dmamap_create(rxr->rxdma.dma_tag,
1369 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 0,
1370 rxr->rxdma.dma_map->dm_mapsize,
1414 ngbe_setup_receive_ring(struct rx_ring *rxr)
1416 struct ngbe_softc *sc = rxr->sc;
1424 bzero((void *)rxr->rx_base, rsize);
1426 if (ngbe_allocate_receive_buffers(rxr))
1430 rxr->next_to_check = 0;
1431 rxr->last_desc_filled = sc->num_rx_desc - 1;
1433 if_rxr_init(&rxr->rx_ring, 2 * ((ifp->if_hardmtu / MCLBYTES) + 1),
1436 ngbe_rxfill(rxr);
1437 if (if_rxr_inuse(&rxr->rx_ring) == 0) {
1472 struct rx_ring *rxr = sc->rx_rings;
1475 for (i = 0; i < sc->sc_nqueues; i++, rxr++) {
1476 if (ngbe_setup_receive_ring(rxr))
1572 struct rx_ring *rxr = sc->rx_rings;
1598 for (i = 0; i < sc->sc_nqueues; i++, rxr++) {
1599 uint64_t rdba = rxr->rxdma.dma_map->dm_segs[0].ds_addr;
1652 NGBE_WRITE_REG(hw, NGBE_PX_RR_WP(i), rxr->last_desc_filled);
1792 struct rx_ring *rxr = nq->rxr;
1796 ngbe_rxeof(rxr);
1798 ngbe_rxrefill(rxr);
2712 ngbe_get_buf(struct rx_ring *rxr, int i)
2714 struct ngbe_softc *sc = rxr->sc;
2720 rxbuf = &rxr->rx_buffers[i];
2721 rxdesc = &rxr->rx_base[i];
2734 error = bus_dmamap_load_mbuf(rxr->rxdma.dma_tag, rxbuf->map, m,
2741 bus_dmamap_sync(rxr->rxdma.dma_tag, rxbuf->map, 0,
4269 ngbe_rxeof(struct rx_ring *rxr)
4271 struct ngbe_softc *sc = rxr->sc;
4285 i = rxr->next_to_check;
4286 while (if_rxr_inuse(&rxr->rx_ring) > 0) {
4290 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
4294 rxdesc = &rxr->rx_base[i];
4297 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
4305 rxbuf = &rxr->rx_buffers[i];
4308 bus_dmamap_sync(rxr->rxdma.dma_tag, rxbuf->map, 0,
4310 bus_dmamap_unload(rxr->rxdma.dma_tag, rxbuf->map);
4334 if_rxr_inuse(&rxr->rx_ring), rxr->last_desc_filled);
4344 nxbuf = &rxr->rx_buffers[nextp];
4382 if_rxr_put(&rxr->rx_ring, 1);
4383 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
4391 rxr->next_to_check = i;
4393 if (ifiq_input(rxr->ifiq, &ml))
4394 if_rxr_livelocked(&rxr->rx_ring);
4403 struct rx_ring *rxr = xrxr;
4404 struct ngbe_softc *sc = rxr->sc;
4406 if (ngbe_rxfill(rxr))
4407 NGBE_WRITE_REG(&sc->hw, NGBE_PX_RR_WP(rxr->me),
4408 rxr->last_desc_filled);
4409 else if (if_rxr_inuse(&rxr->rx_ring) == 0)
4410 timeout_add(&rxr->rx_refill, 1);