Lines Matching defs:sc_if
383 struct sk_if_softc *sc_if = (struct sk_if_softc *)dev;
387 SK_YU_WRITE_2(sc_if, YUKON_SMICR, YU_SMICR_PHYAD(phy) |
392 val = SK_YU_READ_2(sc_if, YUKON_SMICR);
399 sc_if->sk_dev.dv_xname);
406 val = SK_YU_READ_2(sc_if, YUKON_SMIDR);
417 struct sk_if_softc *sc_if = (struct sk_if_softc *)dev;
423 SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val);
424 SK_YU_WRITE_2(sc_if, YUKON_SMICR, YU_SMICR_PHYAD(phy) |
429 if (!(SK_YU_READ_2(sc_if, YUKON_SMICR) & YU_SMICR_BUSY))
434 printf("%s: phy write timed out\n", sc_if->sk_dev.dv_xname);
440 struct sk_if_softc *sc_if = (struct sk_if_softc *)dev;
441 struct mii_data *mii = &sc_if->sk_mii;
445 gpcr = SK_YU_READ_2(sc_if, YUKON_GPCR);
449 sc_if->sk_softc->sk_type == SK_YUKON_FE_P) {
474 SK_YU_WRITE_2(sc_if, YUKON_GPCR, gpcr);
481 msk_iff(struct sk_if_softc *sc_if)
483 struct ifnet *ifp = &sc_if->arpcom.ac_if;
484 struct arpcom *ac = &sc_if->arpcom;
491 rcr = SK_YU_READ_2(sc_if, YUKON_RCR);
526 SK_YU_WRITE_2(sc_if, YUKON_MCAH1, hashes[0] & 0xffff);
527 SK_YU_WRITE_2(sc_if, YUKON_MCAH2, (hashes[0] >> 16) & 0xffff);
528 SK_YU_WRITE_2(sc_if, YUKON_MCAH3, hashes[1] & 0xffff);
529 SK_YU_WRITE_2(sc_if, YUKON_MCAH4, (hashes[1] >> 16) & 0xffff);
530 SK_YU_WRITE_2(sc_if, YUKON_RCR, rcr);
534 msk_init_rx_ring(struct sk_if_softc *sc_if)
536 struct msk_ring_data *rd = sc_if->sk_rdata;
545 sc_if->sk_cdata.sk_rx_prod = 1;
546 sc_if->sk_cdata.sk_rx_cons = 0;
547 sc_if->sk_cdata.sk_rx_hiaddr = 0;
553 if_rxr_init(&sc_if->sk_cdata.sk_rx_ring, 2, (MSK_RX_RING_CNT/2) - 1);
555 msk_fill_rx_ring(sc_if);
560 msk_init_tx_ring(struct sk_if_softc *sc_if)
562 struct sk_softc *sc = sc_if->sk_softc;
563 struct msk_ring_data *rd = sc_if->sk_rdata;
570 if (bus_dmamap_create(sc->sc_dmatag, sc_if->sk_pktlen,
571 SK_NTXSEG, sc_if->sk_pktlen, 0,
573 &sc_if->sk_cdata.sk_tx_maps[i]))
581 sc_if->sk_cdata.sk_tx_prod = 1;
582 sc_if->sk_cdata.sk_tx_cons = 0;
583 sc_if->sk_cdata.sk_tx_hiaddr = 0;
585 MSK_CDTXSYNC(sc_if, 0, MSK_TX_RING_CNT, BUS_DMASYNC_PREWRITE);
591 msk_newbuf(struct sk_if_softc *sc_if)
593 struct msk_ring_data *rd = sc_if->sk_rdata;
600 unsigned int pktlen = sc_if->sk_pktlen + ETHER_ALIGN;
608 prod = sc_if->sk_cdata.sk_rx_prod;
609 map = sc_if->sk_cdata.sk_rx_maps[prod];
611 if (bus_dmamap_load_mbuf(sc_if->sk_softc->sc_dmatag, map, m,
617 bus_dmamap_sync(sc_if->sk_softc->sc_dmatag, map, 0,
625 if (sc_if->sk_cdata.sk_rx_hiaddr != hiaddr) {
632 sc_if->sk_cdata.sk_rx_hiaddr = hiaddr;
643 sc_if->sk_cdata.sk_rx_maps[head] = sc_if->sk_cdata.sk_rx_maps[prod];
644 sc_if->sk_cdata.sk_rx_maps[prod] = map;
646 sc_if->sk_cdata.sk_rx_mbuf[prod] = m;
649 sc_if->sk_cdata.sk_rx_prod = prod;
660 struct sk_if_softc *sc_if = ifp->if_softc;
662 mii_mediachg(&sc_if->sk_mii);
672 struct sk_if_softc *sc_if = ifp->if_softc;
674 mii_pollstat(&sc_if->sk_mii);
675 ifmr->ifm_active = sc_if->sk_mii.mii_media_active;
676 ifmr->ifm_status = sc_if->sk_mii.mii_media_status;
682 struct sk_if_softc *sc_if = ifp->if_softc;
693 msk_init(sc_if);
701 msk_init(sc_if);
704 msk_stop(sc_if, 0);
710 mii = &sc_if->sk_mii;
716 NULL, sc_if->sk_pktlen, &sc_if->sk_cdata.sk_rx_ring);
720 error = ether_ioctl(ifp, &sc_if->arpcom, command, data);
725 msk_iff(sc_if);
945 msk_reset(struct sk_if_softc *sc_if)
948 SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_RESET_SET);
949 SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, SK_GPHY_RESET_SET);
951 SK_IF_WRITE_4(sc_if, 0, SK_GPHY_CTRL, SK_GPHY_RESET_CLEAR);
952 SK_IF_WRITE_4(sc_if, 0, SK_GMAC_CTRL, SK_GMAC_LOOP_OFF |
963 struct sk_if_softc *sc_if = (struct sk_if_softc *)self;
973 sc_if->sk_port = sa->skc_port;
974 sc_if->sk_softc = sc;
975 sc->sk_if[sa->skc_port] = sc_if;
977 DPRINTFN(2, ("begin msk_attach: port=%d\n", sc_if->sk_port));
989 sc_if->arpcom.ac_enaddr[i] =
993 ether_sprintf(sc_if->arpcom.ac_enaddr));
1003 sc_if->sk_rx_ramstart = 0;
1004 sc_if->sk_rx_ramend = sc_if->sk_rx_ramstart + chunk - 1;
1006 sc_if->sk_tx_ramstart = sc_if->sk_rx_ramend + 1;
1007 sc_if->sk_tx_ramend = sc_if->sk_tx_ramstart + chunk - 1;
1011 sc_if->sk_rx_ramstart, sc_if->sk_rx_ramend,
1012 sc_if->sk_tx_ramstart, sc_if->sk_tx_ramend));
1016 PAGE_SIZE, 0, &sc_if->sk_ring_seg, 1, &sc_if->sk_ring_nseg,
1021 if (bus_dmamem_map(sc->sc_dmatag, &sc_if->sk_ring_seg,
1022 sc_if->sk_ring_nseg,
1031 &sc_if->sk_ring_map)) {
1035 if (bus_dmamap_load(sc->sc_dmatag, sc_if->sk_ring_map, kva,
1040 sc_if->sk_rdata = (struct msk_ring_data *)kva;
1044 sc_if->sk_pktlen = SK_JLEN;
1046 sc_if->sk_pktlen = MCLBYTES;
1050 sc_if->sk_pktlen, 1, sc_if->sk_pktlen, 0,
1052 &sc_if->sk_cdata.sk_rx_maps[i])) != 0) {
1059 ifp = &sc_if->arpcom.ac_if;
1060 ifp->if_softc = sc_if;
1069 bcopy(sc_if->sk_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
1073 msk_reset(sc_if);
1078 msk_init_yukon(sc_if);
1082 sc_if->sk_mii.mii_ifp = ifp;
1083 sc_if->sk_mii.mii_readreg = msk_miibus_readreg;
1084 sc_if->sk_mii.mii_writereg = msk_miibus_writereg;
1085 sc_if->sk_mii.mii_statchg = msk_miibus_statchg;
1087 ifmedia_init(&sc_if->sk_mii.mii_media, 0,
1092 mii_attach(self, &sc_if->sk_mii, 0xffffffff, 0,
1094 if (LIST_FIRST(&sc_if->sk_mii.mii_phys) == NULL) {
1095 printf("%s: no PHY found!\n", sc_if->sk_dev.dv_xname);
1096 ifmedia_add(&sc_if->sk_mii.mii_media, IFM_ETHER|IFM_MANUAL,
1098 ifmedia_set(&sc_if->sk_mii.mii_media, IFM_ETHER|IFM_MANUAL);
1100 ifmedia_set(&sc_if->sk_mii.mii_media, IFM_ETHER|IFM_AUTO);
1102 timeout_set(&sc_if->sk_tick_ch, msk_tick, sc_if);
1103 timeout_set(&sc_if->sk_tick_rx, msk_fill_rx_tick, sc_if);
1112 msk_kstat_attach(sc_if);
1120 if (sc_if->sk_cdata.sk_rx_maps[i] != NULL)
1122 sc_if->sk_cdata.sk_rx_maps[i]);
1126 bus_dmamap_destroy(sc->sc_dmatag, sc_if->sk_ring_map);
1130 bus_dmamem_free(sc->sc_dmatag, &sc_if->sk_ring_seg, sc_if->sk_ring_nseg);
1138 struct sk_if_softc *sc_if = (struct sk_if_softc *)self;
1139 struct sk_softc *sc = sc_if->sk_softc;
1140 struct ifnet *ifp= &sc_if->arpcom.ac_if;
1142 if (sc->sk_if[sc_if->sk_port] == NULL)
1145 msk_stop(sc_if, 1);
1148 msk_kstat_detach(sc_if);
1152 if (LIST_FIRST(&sc_if->sk_mii.mii_phys) != NULL)
1153 mii_detach(&sc_if->sk_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1156 ifmedia_delete_instance(&sc_if->sk_mii.mii_media, IFM_INST_ANY);
1161 bus_dmamem_unmap(sc->sc_dmatag, (caddr_t)sc_if->sk_rdata,
1164 &sc_if->sk_ring_seg, sc_if->sk_ring_nseg);
1165 bus_dmamap_destroy(sc->sc_dmatag, sc_if->sk_ring_map);
1166 sc->sk_if[sc_if->sk_port] = NULL;
1174 struct sk_if_softc *sc_if = (void *)self;
1175 struct ifnet *ifp = &sc_if->arpcom.ac_if;
1179 msk_reset(sc_if);
1181 msk_init(sc_if);
1558 msk_encap(struct sk_if_softc *sc_if, struct mbuf *m, uint32_t prod)
1560 struct sk_softc *sc = sc_if->sk_softc;
1561 struct msk_ring_data *rd = sc_if->sk_rdata;
1571 map = sc_if->sk_cdata.sk_tx_maps[prod];
1596 if (sc_if->sk_cdata.sk_tx_hiaddr != hiaddr) {
1601 sc_if->sk_cdata.sk_tx_hiaddr = hiaddr;
1622 sc_if->sk_cdata.sk_tx_maps[prod] = sc_if->sk_cdata.sk_tx_maps[last];
1623 sc_if->sk_cdata.sk_tx_maps[last] = map;
1624 sc_if->sk_cdata.sk_tx_mbuf[last] = m;
1632 struct sk_if_softc *sc_if = ifp->if_softc;
1637 prod = sc_if->sk_cdata.sk_tx_prod;
1638 free = sc_if->sk_cdata.sk_tx_cons;
1643 MSK_CDTXSYNC(sc_if, 0, MSK_TX_RING_CNT, BUS_DMASYNC_POSTWRITE);
1655 used = msk_encap(sc_if, m, prod);
1672 MSK_CDTXSYNC(sc_if, 0, MSK_TX_RING_CNT, BUS_DMASYNC_PREWRITE);
1678 sc_if->sk_cdata.sk_tx_prod = prod;
1679 SK_IF_WRITE_2(sc_if, 1, SK_TXQA1_Y2_PREF_PUTIDX, prod);
1688 struct sk_if_softc *sc_if = ifp->if_softc;
1690 if (sc_if->sk_cdata.sk_tx_prod != sc_if->sk_cdata.sk_tx_cons) {
1691 printf("%s: watchdog timeout\n", sc_if->sk_dev.dv_xname);
1696 mskc_reset(sc_if->sk_softc);
1697 msk_reset(sc_if);
1698 msk_init(sc_if);
1716 msk_rxeof(struct sk_if_softc *sc_if, struct mbuf_list *ml,
1719 struct sk_softc *sc = sc_if->sk_softc;
1720 struct ifnet *ifp = &sc_if->arpcom.ac_if;
1725 prod = sc_if->sk_cdata.sk_rx_prod;
1726 cons = sc_if->sk_cdata.sk_rx_cons;
1732 m = sc_if->sk_cdata.sk_rx_mbuf[tail];
1738 sc_if->sk_cdata.sk_rx_cons = cons;
1745 sc_if->sk_cdata.sk_rx_mbuf[tail] = NULL;
1747 map = sc_if->sk_cdata.sk_rx_maps[tail];
1748 if_rxr_put(&sc_if->sk_cdata.sk_rx_ring, 1);
1750 bus_dmamap_sync(sc_if->sk_softc->sc_dmatag, map, 0, map->dm_mapsize,
1752 bus_dmamap_unload(sc_if->sk_softc->sc_dmatag, map);
1767 msk_txeof(struct sk_if_softc *sc_if, unsigned int prod)
1769 struct ifnet *ifp = &sc_if->arpcom.ac_if;
1770 struct sk_softc *sc = sc_if->sk_softc;
1779 cons = sc_if->sk_cdata.sk_tx_cons;
1785 m = sc_if->sk_cdata.sk_tx_mbuf[cons];
1787 sc_if->sk_cdata.sk_tx_mbuf[cons] = NULL;
1789 map = sc_if->sk_cdata.sk_tx_maps[cons];
1799 if (cons == sc_if->sk_cdata.sk_tx_prod)
1802 sc_if->sk_cdata.sk_tx_cons = cons;
1809 msk_fill_rx_ring(struct sk_if_softc *sc_if)
1813 slots = if_rxr_get(&sc_if->sk_cdata.sk_rx_ring, MSK_RX_RING_CNT/2);
1815 MSK_CDRXSYNC(sc_if, 0, BUS_DMASYNC_POSTWRITE); /* XXX */
1817 used = msk_newbuf(sc_if);
1823 MSK_CDRXSYNC(sc_if, 0, BUS_DMASYNC_PREWRITE); /* XXX */
1825 if_rxr_put(&sc_if->sk_cdata.sk_rx_ring, slots);
1826 if (if_rxr_inuse(&sc_if->sk_cdata.sk_rx_ring) == 0)
1827 timeout_add(&sc_if->sk_tick_rx, 1);
1833 struct sk_if_softc *sc_if = xsc_if;
1837 if (if_rxr_inuse(&sc_if->sk_cdata.sk_rx_ring) == 0) {
1838 msk_fill_rx_ring(sc_if);
1839 SK_IF_WRITE_2(sc_if, 0, SK_RXQ1_Y2_PREF_PUTIDX,
1840 sc_if->sk_cdata.sk_rx_prod);
1848 struct sk_if_softc *sc_if = xsc_if;
1849 struct mii_data *mii = &sc_if->sk_mii;
1855 timeout_add_sec(&sc_if->sk_tick_ch, 1);
1859 msk_intr_yukon(struct sk_if_softc *sc_if)
1863 status = SK_IF_READ_1(sc_if, 0, SK_GMAC_ISR);
1866 SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST,
1871 SK_IF_WRITE_1(sc_if, 0, SK_TXMF1_CTRL_TEST,
1982 msk_init_yukon(struct sk_if_softc *sc_if)
1989 sc = sc_if->sk_softc;
1992 CSR_READ_4(sc_if->sk_softc, SK_CSR)));
1997 SK_IF_READ_4(sc_if, 0, SK_GMAC_CTRL)));
2003 SK_IF_READ_2(sc_if, 0, SK_GMAC_ISR);
2006 reg = SK_YU_READ_2(sc_if, YUKON_PAR);
2013 SK_YU_WRITE_2(sc_if, YUKON_PAR, reg);
2018 SK_YU_WRITE_2(sc_if, YUKON_PAR, reg);
2022 SK_YU_WRITE_2(sc_if, YUKON_RCR, YU_RCR_CRCR);
2026 SK_YU_WRITE_2(sc_if, YUKON_TPR, YU_TPR_JAM_LEN(0x3) |
2039 SK_YU_WRITE_2(sc_if, YUKON_SMR, reg);
2045 SK_YU_WRITE_2(sc_if, YUKON_SAL1 + i * 4,
2046 sc_if->arpcom.ac_enaddr[i * 2] |
2047 sc_if->arpcom.ac_enaddr[i * 2 + 1] << 8);
2051 reg = sk_win_read_2(sc_if->sk_softc,
2052 SK_MAC1_0 + i * 2 + sc_if->sk_port * 8);
2053 SK_YU_WRITE_2(sc_if, YUKON_SAL2 + i * 4, reg);
2058 msk_iff(sc_if);
2062 SK_YU_WRITE_2(sc_if, YUKON_TIMR, 0);
2063 SK_YU_WRITE_2(sc_if, YUKON_RIMR, 0);
2064 SK_YU_WRITE_2(sc_if, YUKON_TRIMR, 0);
2070 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_MASK, v);
2073 SK_IF_WRITE_1(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_CLEAR);
2074 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_CTRL_TEST, SK_RFCTL_OPERATION_ON |
2078 SK_IF_WRITE_2(sc_if, 0, SK_RXMF1_FLUSH_THRESHOLD,
2082 SK_IF_WRITE_1(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_CLEAR);
2083 SK_IF_WRITE_2(sc_if, 0, SK_TXMF1_CTRL_TEST, SK_TFCTL_OPERATION_ON);
2086 SK_YU_WRITE_2(sc_if, YUKON_GPCR, YU_GPCR_TXEN | YU_GPCR_RXEN);
2098 struct sk_if_softc *sc_if = xsc_if;
2099 struct sk_softc *sc = sc_if->sk_softc;
2100 struct ifnet *ifp = &sc_if->arpcom.ac_if;
2101 struct mii_data *mii = &sc_if->sk_mii;
2109 msk_stop(sc_if, 0);
2114 msk_init_yukon(sc_if);
2118 SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, SK_TXARCTL_ON);
2124 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_UNRESET);
2125 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_START, sc_if->sk_rx_ramstart);
2126 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_WR_PTR, sc_if->sk_rx_ramstart);
2127 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_RD_PTR, sc_if->sk_rx_ramstart);
2128 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_END, sc_if->sk_rx_ramend);
2129 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_ON);
2131 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_CTLTST, SK_RBCTL_UNRESET);
2132 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_CTLTST, SK_RBCTL_STORENFWD_ON);
2133 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_START, sc_if->sk_tx_ramstart);
2134 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_WR_PTR, sc_if->sk_tx_ramstart);
2135 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_RD_PTR, sc_if->sk_tx_ramstart);
2136 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_END, sc_if->sk_tx_ramend);
2137 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_CTLTST, SK_RBCTL_ON);
2140 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, 0x00000016);
2141 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, 0x00000d28);
2142 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, 0x00000080);
2143 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_WATERMARK, 0x00000600);
2145 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_BMU_CSR, 0x00000016);
2146 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_BMU_CSR, 0x00000d28);
2147 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_BMU_CSR, 0x00000080);
2148 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_WATERMARK, 0x00000600);
2151 SK_IF_WRITE_4(sc_if, 1, SK_TXRBS1_CTLTST, SK_RBCTL_RESET);
2154 if (msk_init_rx_ring(sc_if) == ENOBUFS) {
2156 "memory for rx buffers\n", sc_if->sk_dev.dv_xname);
2157 msk_stop(sc_if, 0);
2162 if (msk_init_tx_ring(sc_if) == ENOBUFS) {
2164 "memory for tx buffers\n", sc_if->sk_dev.dv_xname);
2165 msk_stop(sc_if, 0);
2171 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_CSR, 0x00000001);
2172 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_CSR, 0x00000002);
2173 SK_IF_WRITE_2(sc_if, 0, SK_RXQ1_Y2_PREF_LIDX, MSK_RX_RING_CNT - 1);
2174 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_ADDRLO,
2175 MSK_RX_RING_ADDR(sc_if, 0));
2176 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_ADDRHI,
2177 (u_int64_t)MSK_RX_RING_ADDR(sc_if, 0) >> 32);
2178 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_CSR, 0x00000008);
2179 SK_IF_READ_4(sc_if, 0, SK_RXQ1_Y2_PREF_CSR);
2181 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_CSR, 0x00000001);
2182 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_CSR, 0x00000002);
2183 SK_IF_WRITE_2(sc_if, 1, SK_TXQA1_Y2_PREF_LIDX, MSK_TX_RING_CNT - 1);
2184 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_ADDRLO,
2185 MSK_TX_RING_ADDR(sc_if, 0));
2186 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_ADDRHI,
2187 (u_int64_t)MSK_TX_RING_ADDR(sc_if, 0) >> 32);
2188 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_CSR, 0x00000008);
2189 SK_IF_READ_4(sc_if, 1, SK_TXQA1_Y2_PREF_CSR);
2191 SK_IF_WRITE_2(sc_if, 0, SK_RXQ1_Y2_PREF_PUTIDX,
2192 sc_if->sk_cdata.sk_rx_prod);
2199 SK_IF_WRITE_2(sc_if, 1, SK_TXQA1_Y2_PREF_PUTIDX, 0);
2202 if (sc_if->sk_port == SK_PORT_A)
2212 timeout_add_sec(&sc_if->sk_tick_ch, 1);
2218 msk_stop(struct sk_if_softc *sc_if, int softonly)
2220 struct sk_softc *sc = sc_if->sk_softc;
2221 struct ifnet *ifp = &sc_if->arpcom.ac_if;
2228 timeout_del(&sc_if->sk_tick_ch);
2229 timeout_del(&sc_if->sk_tick_rx);
2240 SK_IF_WRITE_1(sc_if,0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_SET);
2241 SK_IF_WRITE_1(sc_if,0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_SET);
2242 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_BMU_CSR, SK_RXBMU_OFFLINE);
2243 SK_IF_WRITE_4(sc_if, 0, SK_RXRB1_CTLTST, SK_RBCTL_RESET|SK_RBCTL_OFF);
2244 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_BMU_CSR, SK_TXBMU_OFFLINE);
2245 SK_IF_WRITE_4(sc_if, 1, SK_TXRBA1_CTLTST, SK_RBCTL_RESET|SK_RBCTL_OFF);
2246 SK_IF_WRITE_1(sc_if, 0, SK_TXAR1_COUNTERCTL, SK_TXARCTL_OFF);
2247 SK_IF_WRITE_1(sc_if, 0, SK_RXLED1_CTL, SK_RXLEDCTL_COUNTER_STOP);
2248 SK_IF_WRITE_1(sc_if, 0, SK_TXLED1_CTL, SK_TXLEDCTL_COUNTER_STOP);
2249 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_OFF);
2250 SK_IF_WRITE_1(sc_if, 0, SK_LINKLED1_CTL, SK_LINKLED_LINKSYNC_OFF);
2252 SK_IF_WRITE_4(sc_if, 0, SK_RXQ1_Y2_PREF_CSR, 0x00000001);
2253 SK_IF_WRITE_4(sc_if, 1, SK_TXQA1_Y2_PREF_CSR, 0x00000001);
2256 if (sc_if->sk_port == SK_PORT_A)
2265 m = sc_if->sk_cdata.sk_rx_mbuf[i];
2269 map = sc_if->sk_cdata.sk_rx_maps[i];
2276 sc_if->sk_cdata.sk_rx_mbuf[i] = NULL;
2279 sc_if->sk_cdata.sk_rx_prod = 0;
2280 sc_if->sk_cdata.sk_rx_cons = 0;
2283 m = sc_if->sk_cdata.sk_tx_mbuf[i];
2287 map = sc_if->sk_cdata.sk_tx_maps[i];
2294 sc_if->sk_cdata.sk_tx_mbuf[i] = NULL;
2318 msk_mib_read32(struct sk_if_softc *sc_if, uint32_t r)
2322 hi = SK_YU_READ_2(sc_if, r + 4);
2325 lo = SK_YU_READ_2(sc_if, r);
2326 xx = SK_YU_READ_2(sc_if, r + 4);
2338 msk_mib_read64(struct sk_if_softc *sc_if, uint32_t r)
2342 hi = msk_mib_read32(sc_if, r + 8);
2344 lo = msk_mib_read32(sc_if, r);
2345 xx = msk_mib_read32(sc_if, r + 8);
2357 msk_kstat_attach(struct sk_if_softc *sc_if)
2364 ks = kstat_create(sc_if->sk_dev.dv_xname, 0, "msk-mib", 0,
2382 ks->ks_softc = sc_if;
2390 sc_if->sk_kstat = mks;
2394 msk_kstat_detach(struct sk_if_softc *sc_if)
2396 struct msk_kstat *mks = sc_if->sk_kstat;
2403 sc_if->sk_kstat = NULL;
2416 struct sk_if_softc *sc_if = ks->ks_softc;
2427 kstat_kv_u32(&kvs[i]) = msk_mib_read32(sc_if, m->reg);
2430 kstat_kv_u64(&kvs[i]) = msk_mib_read64(sc_if, m->reg);