Lines Matching defs:rxr

1058 	struct iavf_rx_ring *rxr;
1075 		rxr = ifp->if_iqs[i]->ifiq_softc;
1093 		htolem64(&rxq->dma_ring_addr, IAVF_DMA_DVA(&rxr->rxr_mem));
1177 	struct iavf_rx_ring *rxr;
1192 		rxr = iavf_rxr_alloc(sc, i);
1193 		if (rxr == NULL)
1198 			iavf_rxr_free(sc, rxr);
1202 		ifp->if_iqs[i]->ifiq_softc = rxr;
1205 		iavf_rxfill(sc, rxr);
1229 		rxr = ifp->if_iqs[i]->ifiq_softc;
1232 		if (rxr == NULL) {
1241 		iavf_rxr_free(sc, rxr);
1364 	struct iavf_rx_ring *rxr;
1393 		rxr = ifp->if_iqs[i]->ifiq_softc;
1398 		timeout_del_barrier(&rxr->rxr_refill);
1402 		rxr = ifp->if_iqs[i]->ifiq_softc;
1406 		iavf_rxr_clean(sc, rxr);
1409 		iavf_rxr_free(sc, rxr);
1880 	struct iavf_rx_ring *rxr;
1884 	rxr = malloc(sizeof(*rxr), M_DEVBUF, M_WAITOK|M_CANFAIL);
1885 	if (rxr == NULL)
1893 	if (iavf_dmamem_alloc(sc, &rxr->rxr_mem,
1910 	rxr->rxr_sc = sc;
1911 	if_rxr_init(&rxr->rxr_acct, 17, sc->sc_rx_ring_ndescs - 1);
1912 	timeout_set(&rxr->rxr_refill, iavf_rxrefill, rxr);
1913 	rxr->rxr_cons = rxr->rxr_prod = 0;
1914 	rxr->rxr_m_head = NULL;
1915 	rxr->rxr_m_tail = &rxr->rxr_m_head;
1916 	rxr->rxr_maps = maps;
1918 	rxr->rxr_tail = I40E_QRX_TAIL1(qid);
1919 	rxr->rxr_qid = qid;
1921 	return (rxr);
1933 	iavf_dmamem_free(sc, &rxr->rxr_mem);
1937 	free(rxr, M_DEVBUF, sizeof(*rxr));
1942 iavf_rxr_clean(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
1948 	timeout_del_barrier(&rxr->rxr_refill);
1950 	maps = rxr->rxr_maps;
1966 	m_freem(rxr->rxr_m_head);
1967 	rxr->rxr_m_head = NULL;
1968 	rxr->rxr_m_tail = &rxr->rxr_m_head;
1970 	rxr->rxr_prod = rxr->rxr_cons = 0;
1974 iavf_rxr_free(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
1979 	maps = rxr->rxr_maps;
1986 	iavf_dmamem_free(sc, &rxr->rxr_mem);
1988 	free(rxr, M_DEVBUF, sizeof(*rxr));
2012 	struct iavf_rx_ring *rxr = ifiq->ifiq_softc;
2029 	prod = rxr->rxr_prod;
2030 	cons = rxr->rxr_cons;
2035 	bus_dmamap_sync(sc->sc_dmat, IAVF_DMA_MAP(&rxr->rxr_mem),
2036 	    0, IAVF_DMA_LEN(&rxr->rxr_mem),
2039 	ring = IAVF_DMA_KVA(&rxr->rxr_mem);
2049 		if_rxr_put(&rxr->rxr_acct, 1);
2051 		rxm = &rxr->rxr_maps[cons];
2066 		*rxr->rxr_m_tail = m;
2067 		rxr->rxr_m_tail = &m->m_next;
2069 		m = rxr->rxr_m_head;
2091 			rxr->rxr_m_head = NULL;
2092 			rxr->rxr_m_tail = &rxr->rxr_m_head;
2102 		rxr->rxr_cons = cons;
2104 			if_rxr_livelocked(&rxr->rxr_acct);
2105 		iavf_rxfill(sc, rxr);
2108 	bus_dmamap_sync(sc->sc_dmat, IAVF_DMA_MAP(&rxr->rxr_mem),
2109 	    0, IAVF_DMA_LEN(&rxr->rxr_mem),
2116 iavf_rxfill(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
2127 	slots = if_rxr_get(&rxr->rxr_acct, sc->sc_rx_ring_ndescs);
2131 	prod = rxr->rxr_prod;
2133 	ring = IAVF_DMA_KVA(&rxr->rxr_mem);
2137 		rxm = &rxr->rxr_maps[prod];
2169 	if_rxr_put(&rxr->rxr_acct, slots);
2171 	if (if_rxr_inuse(&rxr->rxr_acct) == 0)
2172 		timeout_add(&rxr->rxr_refill, 1);
2174 		rxr->rxr_prod = prod;
2175 		iavf_wr(sc, rxr->rxr_tail, prod);
2182 	struct iavf_rx_ring *rxr = arg;
2183 	struct iavf_softc *sc = rxr->rxr_sc;
2185 	iavf_rxfill(sc, rxr);