Lines Matching defs:eeprom

2410 	/* Wait 15ms for MAC to configure PHY from eeprom settings */
2883 /* Wait 15ms for MAC to configure PHY from eeprom settings */
6278 * Sets up eeprom variables in the hw struct. Must be called after mac_type
6287 struct em_eeprom_info *eeprom = &hw->eeprom;
6298 eeprom->type = em_eeprom_microwire;
6299 eeprom->word_size = 64;
6300 eeprom->opcode_bits = 3;
6301 eeprom->address_bits = 6;
6302 eeprom->delay_usec = 50;
6303 eeprom->use_eerd = FALSE;
6304 eeprom->use_eewr = FALSE;
6312 eeprom->type = em_eeprom_microwire;
6313 eeprom->opcode_bits = 3;
6314 eeprom->delay_usec = 50;
6316 eeprom->word_size = 256;
6317 eeprom->address_bits = 8;
6319 eeprom->word_size = 64;
6320 eeprom->address_bits = 6;
6322 eeprom->use_eerd = FALSE;
6323 eeprom->use_eewr = FALSE;
6330 eeprom->type = em_eeprom_spi;
6331 eeprom->opcode_bits = 8;
6332 eeprom->delay_usec = 1;
6334 eeprom->page_size = 32;
6335 eeprom->address_bits = 16;
6337 eeprom->page_size = 8;
6338 eeprom->address_bits = 8;
6341 eeprom->type = em_eeprom_microwire;
6342 eeprom->opcode_bits = 3;
6343 eeprom->delay_usec = 50;
6345 eeprom->word_size = 256;
6346 eeprom->address_bits = 8;
6348 eeprom->word_size = 64;
6349 eeprom->address_bits = 6;
6352 eeprom->use_eerd = FALSE;
6353 eeprom->use_eewr = FALSE;
6357 eeprom->type = em_eeprom_spi;
6358 eeprom->opcode_bits = 8;
6359 eeprom->delay_usec = 1;
6361 eeprom->page_size = 32;
6362 eeprom->address_bits = 16;
6364 eeprom->page_size = 8;
6365 eeprom->address_bits = 8;
6367 eeprom->use_eerd = FALSE;
6368 eeprom->use_eewr = FALSE;
6377 eeprom->type = em_eeprom_spi;
6378 eeprom->opcode_bits = 8;
6379 eeprom->delay_usec = 1;
6381 eeprom->page_size = 32;
6382 eeprom->address_bits = 16;
6384 eeprom->page_size = 8;
6385 eeprom->address_bits = 8;
6387 eeprom->use_eerd = TRUE;
6388 eeprom->use_eewr = TRUE;
6390 eeprom->type = em_eeprom_flash;
6391 eeprom->word_size = 2048;
6401 eeprom->type = em_eeprom_invm;
6402 eeprom->word_size = INVM_SIZE;
6403 eeprom->use_eerd = FALSE;
6404 eeprom->use_eewr = FALSE;
6408 eeprom->type = em_eeprom_spi;
6409 eeprom->opcode_bits = 8;
6410 eeprom->delay_usec = 1;
6412 eeprom->page_size = 32;
6413 eeprom->address_bits = 16;
6415 eeprom->page_size = 8;
6416 eeprom->address_bits = 8;
6418 eeprom->use_eerd = TRUE;
6419 eeprom->use_eewr = FALSE;
6431 eeprom->type = em_eeprom_ich8;
6432 eeprom->use_eerd = FALSE;
6433 eeprom->use_eewr = FALSE;
6434 eeprom->word_size = E1000_SHADOW_RAM_WORDS;
6469 eeprom->type = em_eeprom_ich8;
6470 eeprom->use_eerd = FALSE;
6471 eeprom->use_eewr = FALSE;
6472 eeprom->word_size = E1000_SHADOW_RAM_WORDS;
6495 if (eeprom->type == em_eeprom_spi) {
6497 * eeprom_size will be an enum [0..8] that maps to eeprom
6501 /* Set to default value for initial eeprom read. */
6502 eeprom->word_size = 64;
6510 * 256B eeprom size was not supported in earlier
6526 eeprom->word_size = 1 << EEPROM_WORD_SIZE_SHIFT_MAX;
6528 eeprom->word_size = 1 <<
6551 usec_delay(hw->eeprom.delay_usec);
6570 usec_delay(hw->eeprom.delay_usec);
6583 struct em_eeprom_info *eeprom = &hw->eeprom;
6593 if (eeprom->type == em_eeprom_microwire) {
6595 } else if (eeprom->type == em_eeprom_spi) {
6614 usec_delay(eeprom->delay_usec);
6678 struct em_eeprom_info *eeprom = &hw->eeprom;
6709 if (eeprom->type == em_eeprom_microwire) {
6717 } else if (eeprom->type == em_eeprom_spi) {
6734 struct em_eeprom_info *eeprom = &hw->eeprom;
6738 if (eeprom->type == em_eeprom_microwire) {
6742 usec_delay(eeprom->delay_usec);
6748 usec_delay(eeprom->delay_usec);
6754 usec_delay(eeprom->delay_usec);
6760 usec_delay(eeprom->delay_usec);
6761 } else if (eeprom->type == em_eeprom_spi) {
6766 usec_delay(eeprom->delay_usec);
6770 usec_delay(eeprom->delay_usec);
6787 if (hw->eeprom.type == em_eeprom_spi) {
6793 usec_delay(hw->eeprom.delay_usec);
6794 } else if (hw->eeprom.type == em_eeprom_microwire) {
6795 /* cleanup eeprom */
6806 usec_delay(hw->eeprom.delay_usec);
6812 usec_delay(hw->eeprom.delay_usec);
6842 hw->eeprom.opcode_bits);
6875 struct em_eeprom_info *eeprom = &hw->eeprom;
6879 /* If eeprom is not yet detected, do so now */
6880 if (eeprom->word_size == 0)
6886 if ((offset >= eeprom->word_size) ||
6887 (words > eeprom->word_size - offset) ||
6890 " size = %d\n", offset, eeprom->word_size);
6900 hw->eeprom.use_eerd == FALSE) {
6905 /* Eerd register EEPROM access requires no eeprom acquire/release */
6906 if (eeprom->use_eerd == TRUE)
6910 if (eeprom->type == em_eeprom_ich8)
6914 if (eeprom->type == em_eeprom_invm)
6921 if (eeprom->type == em_eeprom_spi) {
6933 if ((eeprom->address_bits == 8) && (offset >= 128))
6937 em_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits);
6939 eeprom->address_bits);
6941 * Read the data. The address of the eeprom internally
6943 * overhead of eeprom setup and tear-down. The address
6945 * eeprom, thus allowing the entire memory to be read
6952 } else if (eeprom->type == em_eeprom_microwire) {
6956 eeprom->opcode_bits);
6958 eeprom->address_bits);
6961 * the overhead of eeprom setup and tear-down.
7240 } else if (hw->eeprom.type == em_eeprom_flash) {
7242 } else if (hw->eeprom.type == em_eeprom_ich8) {
7271 struct em_eeprom_info *eeprom = &hw->eeprom;
7275 /* If eeprom is not yet detected, do so now */
7276 if (eeprom->word_size == 0)
7282 if ((offset >= eeprom->word_size) ||
7283 (words > eeprom->word_size - offset) ||
7289 if (eeprom->use_eewr == TRUE)
7292 if (eeprom->type == em_eeprom_ich8)
7299 if (eeprom->type == em_eeprom_microwire) {
7325 struct em_eeprom_info *eeprom = &hw->eeprom;
7338 eeprom->opcode_bits);
7345 if ((eeprom->address_bits == 8) && (offset >= 128))
7349 em_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits);
7352 eeprom->address_bits);
7357 * eeprom
7365 * Some larger eeprom sizes are capable of a 32-byte
7370 if ((((offset + widx) * 2) % eeprom->page_size) == 0) {
7393 struct em_eeprom_info *eeprom = &hw->eeprom;
7406 (uint16_t) (eeprom->opcode_bits + 2));
7408 em_shift_out_ee_bits(hw, 0, (uint16_t) (eeprom->address_bits - 2));
7416 eeprom->opcode_bits);
7419 eeprom->address_bits);
7457 (uint16_t) (eeprom->opcode_bits + 2));
7459 em_shift_out_ee_bits(hw, 0, (uint16_t) (eeprom->address_bits - 2));
7465 * Flushes the cached eeprom to NVM. This is done by saving the modified values
7466 * in the eeprom cache and the non modified values in the currently active bank
9739 timeout = hw->eeprom.word_size + 1;
9802 int32_t timeout = hw->eeprom.word_size + 1;