Lines Matching defs:pmcfg

724 	uint32_t pmcfg;
728 pmcfg = CSR_READ_4(sc, ALC_PM_CFG);
729 pmcfg &= ~(PM_CFG_L1_ENTRY_TIMER_MASK | PM_CFG_CLK_SWH_L1 |
732 pmcfg |= PM_CFG_SERDES_BUDS_RX_L1_ENB |
734 CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
979 uint32_t pmcfg;
982 pmcfg = CSR_READ_4(sc, ALC_PM_CFG);
988 pmcfg &= ~PM_CFG_SERDES_PD_EX_L1;
989 pmcfg &= ~(PM_CFG_L1_ENTRY_TIMER_MASK | PM_CFG_LCKDET_TIMER_MASK);
990 pmcfg |= PM_CFG_MAC_ASPM_CHK;
991 pmcfg |= (PM_CFG_LCKDET_TIMER_DEFAULT << PM_CFG_LCKDET_TIMER_SHIFT);
992 pmcfg &= ~(PM_CFG_ASPM_L1_ENB | PM_CFG_ASPM_L0S_ENB);
1001 pmcfg &= ~(PM_CFG_EN_BUFS_RX_L0S | PM_CFG_SA_DLY_ENB |
1003 pmcfg |= (PM_CFG_L1_ENTRY_TIMER_DEFAULT <<
1005 pmcfg &= ~PM_CFG_PM_REQ_TIMER_MASK;
1006 pmcfg |= (PM_CFG_PM_REQ_TIMER_DEFAULT <<
1008 pmcfg |= PM_CFG_SERDES_PD_EX_L1 | PM_CFG_PCIE_RECV;
1013 pmcfg |= PM_CFG_ASPM_L0S_ENB;
1015 pmcfg |= PM_CFG_ASPM_L1_ENB;
1018 pmcfg &= ~PM_CFG_ASPM_L0S_ENB;
1019 pmcfg &= ~(PM_CFG_SERDES_L1_ENB |
1022 pmcfg |= PM_CFG_CLK_SWH_L1;
1024 pmcfg &= ~PM_CFG_L1_ENTRY_TIMER_MASK;
1027 pmcfg |= (7 <<
1032 pmcfg |= (4 <<
1036 pmcfg |= (15 <<
1042 pmcfg |= PM_CFG_SERDES_L1_ENB |
1045 pmcfg &= ~(PM_CFG_CLK_SWH_L1 |
1049 pmcfg &= ~(PM_CFG_SERDES_BUDS_RX_L1_ENB | PM_CFG_SERDES_L1_ENB |
1051 pmcfg |= PM_CFG_CLK_SWH_L1;
1053 pmcfg |= PM_CFG_ASPM_L1_ENB;
1055 CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
1062 uint32_t pmcfg;
1064 pmcfg = CSR_READ_4(sc, ALC_PM_CFG);
1065 pmcfg &= ~PM_CFG_L1_ENTRY_TIMER_816X_MASK;
1066 pmcfg |= PM_CFG_L1_ENTRY_TIMER_816X_DEFAULT;
1067 pmcfg &= ~PM_CFG_PM_REQ_TIMER_MASK;
1068 pmcfg |= PM_CFG_PM_REQ_TIMER_816X_DEFAULT;
1069 pmcfg &= ~PM_CFG_LCKDET_TIMER_MASK;
1070 pmcfg |= PM_CFG_LCKDET_TIMER_DEFAULT;
1071 pmcfg |= PM_CFG_SERDES_PD_EX_L1 | PM_CFG_CLK_SWH_L1 | PM_CFG_PCIE_RECV;
1072 pmcfg &= ~(PM_CFG_RX_L1_AFTER_L0S | PM_CFG_TX_L1_AFTER_L0S |
1079 pmcfg |= PM_CFG_SERDES_L1_ENB | PM_CFG_SERDES_PLL_L1_ENB;
1082 pmcfg |= PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB |
1086 pmcfg |= PM_CFG_ASPM_L0S_ENB | PM_CFG_ASPM_L1_ENB |
1089 pmcfg |= PM_CFG_ASPM_L1_ENB | PM_CFG_MAC_ASPM_CHK;
1091 CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
2596 uint32_t reg, pmcfg = 0;
2605 pmcfg = CSR_READ_4(sc, ALC_PM_CFG);
2606 if ((pmcfg & (PM_CFG_ASPM_L0S_ENB |
2608 pmcfg &= ~(PM_CFG_ASPM_L0S_ENB |
2610 CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);
2654 if ((pmcfg & (PM_CFG_ASPM_L0S_ENB |
2656 CSR_WRITE_4(sc, ALC_PM_CFG, pmcfg);