81 			   u32 addr, u32 *val)  in vlv_sideband_rw()  argument
103 	intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val);  in vlv_sideband_rw()
116 			*val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA);  in vlv_sideband_rw()
131 	u32 val = 0;  in vlv_punit_read()  local
134 			SB_CRRDDA_NP, addr, &val);  in vlv_punit_read()
136 	return val;  in vlv_punit_read()
139 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val)  in vlv_punit_write()  argument
142 			       SB_CRWRDA_NP, addr, &val);  in vlv_punit_write()
147 	u32 val = 0;  in vlv_bunit_read()  local
150 			SB_CRRDDA_NP, reg, &val);  in vlv_bunit_read()
152 	return val;  in vlv_bunit_read()
155 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val)  in vlv_bunit_write()  argument
158 			SB_CRWRDA_NP, reg, &val);  in vlv_bunit_write()
163 	u32 val = 0;  in vlv_nc_read()  local
166 			SB_CRRDDA_NP, addr, &val);  in vlv_nc_read()
168 	return val;  in vlv_nc_read()
173 	u32 val = 0;  in vlv_iosf_sb_read()  local
176 			SB_CRRDDA_NP, reg, &val);  in vlv_iosf_sb_read()
178 	return val;  in vlv_iosf_sb_read()
182 		       u8 port, u32 reg, u32 val)  in vlv_iosf_sb_write()  argument
185 			SB_CRWRDA_NP, reg, &val);  in vlv_iosf_sb_write()
190 	u32 val = 0;  in vlv_cck_read()  local
193 			SB_CRRDDA_NP, reg, &val);  in vlv_cck_read()
195 	return val;  in vlv_cck_read()
198 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val)  in vlv_cck_write()  argument
201 			SB_CRWRDA_NP, reg, &val);  in vlv_cck_write()
206 	u32 val = 0;  in vlv_ccu_read()  local
209 			SB_CRRDDA_NP, reg, &val);  in vlv_ccu_read()
211 	return val;  in vlv_ccu_read()
214 void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val)  in vlv_ccu_write()  argument
217 			SB_CRWRDA_NP, reg, &val);  in vlv_ccu_write()
235 	u32 val = 0;  in vlv_dpio_read()  local
237 	vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MRD_NP, reg, &val);  in vlv_dpio_read()
243 	drm_WARN(&i915->drm, val == 0xffffffff,  in vlv_dpio_read()
245 		 pipe_name(pipe), reg, val);  in vlv_dpio_read()
247 	return val;  in vlv_dpio_read()
251 		    enum pipe pipe, int reg, u32 val)  in vlv_dpio_write()  argument
255 	vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MWR_NP, reg, &val);  in vlv_dpio_write()
260 	u32 val = 0;  in vlv_flisdsi_read()  local
263 			reg, &val);  in vlv_flisdsi_read()
264 	return val;  in vlv_flisdsi_read()
267 void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val)  in vlv_flisdsi_write()  argument
270 			reg, &val);  in vlv_flisdsi_write()