Lines Matching defs:pipe

341 		 * - pipe and plane scaling (TODO verify this)
520 enum pipe pipe = plane->pipe;
563 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0),
565 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1),
567 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2),
569 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3),
571 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4),
573 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5),
576 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0),
578 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),
580 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 2),
583 PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 0), 0x0);
585 PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 1), 0x0);
587 PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
624 enum pipe pipe = plane->pipe;
628 intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
629 intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
638 enum pipe pipe = plane->pipe;
641 intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
646 intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
647 intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
652 enum pipe *pipe)
660 power_domain = POWER_DOMAIN_PIPE(plane->pipe);
665 ret = intel_de_read(dev_priv, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;
667 *pipe = plane->pipe;
1084 enum pipe pipe = plane->pipe;
1086 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 0), 0);
1087 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 1), 0);
1089 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 2), 0);
1090 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 3), 0);
1092 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 4), 0);
1093 intel_de_write_fw(i915, PLANE_CSC_COEFF(pipe, plane_id, 5), 0);
1095 intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 0), 0);
1096 intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 1), 0);
1097 intel_de_write_fw(i915, PLANE_CSC_PREOFF(pipe, plane_id, 2), 0);
1099 intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 0), 0);
1100 intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 1), 0);
1101 intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);
1120 enum pipe pipe = plane->pipe;
1133 intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
1135 intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
1137 intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
1150 enum pipe pipe = plane->pipe;
1162 intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
1163 intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
1164 intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
1166 intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
1169 intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
1172 intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
1177 intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
1194 intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
1195 intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
1206 enum pipe pipe = plane->pipe;
1227 intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
1229 intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
1231 intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
1234 intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
1235 intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
1236 intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
1238 intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
1242 intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 0),
1244 intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 1),
1250 intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
1254 intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id),
1257 intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
1281 enum pipe pipe = plane->pipe;
1305 intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
1306 intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
1318 enum pipe pipe = plane->pipe;
1326 intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
1327 intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
1940 static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)
1942 return pipe - PIPE_A + INTEL_FBC_A;
1955 enum pipe pipe, enum plane_id plane_id)
1957 enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(pipe);
1966 enum pipe pipe, enum plane_id plane_id)
1972 if (DISPLAY_VER(dev_priv) == 9 && pipe == PIPE_C)
1982 enum pipe pipe, enum plane_id plane_id,
1985 if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
1995 enum pipe pipe, enum plane_id plane_id,
1998 if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
2008 enum pipe pipe, enum plane_id plane_id,
2151 enum pipe pipe = plane->pipe;
2154 bdw_enable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
2162 enum pipe pipe = plane->pipe;
2165 bdw_disable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
2170 enum pipe pipe, enum plane_id plane_id)
2185 return pipe != PIPE_C;
2187 return pipe != PIPE_C &&
2215 enum pipe pipe, enum plane_id plane_id)
2226 if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) {
2240 enum pipe pipe, enum plane_id plane_id)
2256 plane->pipe = pipe;
2258 plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);
2260 intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
2302 formats = icl_get_plane_formats(dev_priv, pipe,
2305 formats = glk_get_plane_formats(dev_priv, pipe,
2308 formats = skl_get_plane_formats(dev_priv, pipe,
2322 skl_get_plane_caps(dev_priv, pipe, plane_id));
2329 pipe_name(pipe));
2397 enum pipe pipe;
2405 if (!plane->get_hw_state(plane, &pipe))
2408 drm_WARN_ON(dev, pipe != crtc->pipe);
2426 val = intel_de_read(dev_priv, PLANE_CTL(pipe, plane_id));
2436 color_ctl = intel_de_read(dev_priv, PLANE_COLOR_CTL(pipe, plane_id));
2529 base = intel_de_read(dev_priv, PLANE_SURF(pipe, plane_id)) & PLANE_SURF_ADDR_MASK;
2532 offset = intel_de_read(dev_priv, PLANE_OFFSET(pipe, plane_id));
2535 val = intel_de_read(dev_priv, PLANE_SIZE(pipe, plane_id));
2539 val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
2569 enum pipe pipe = crtc->pipe;
2584 intel_de_write(i915, PLANE_SURF(pipe, plane_id), base);