Lines Matching defs:dpcd

136 /* update sink rates from dpcd */
158 	max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
173 	if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B) {
237 	intel_dp->max_sink_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
897 	if (!drm_dp_is_branch(intel_dp->dpcd))
914 	if (!drm_dp_is_branch(intel_dp->dpcd))
2325 		drm_dp_enhanced_frame_cap(intel_dp->dpcd);
2434 	return intel_dp->dpcd[DP_DPCD_REV] == 0x11 &&
2435 		drm_dp_is_branch(intel_dp->dpcd) &&
2503 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
2564 	if (intel_dp->dpcd[DP_DPCD_REV] == 0)
2766 	if (drm_dp_is_branch(intel_dp->dpcd) &&
2929 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x13)
2932 	if (!drm_dp_is_branch(intel_dp->dpcd))
3010 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 ||
3104 	if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) {
3111 			    mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso,
3130 	drm_WARN_ON(&dev_priv->drm, intel_dp->dpcd[DP_DPCD_REV] != 0);
3132 	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0)
3136 			 drm_dp_is_branch(intel_dp->dpcd));
3221 					  intel_dp->dpcd,
3239 				 drm_dp_is_branch(intel_dp->dpcd));
3269 	return drm_dp_read_downstream_info(&intel_dp->aux, intel_dp->dpcd,
3280 		drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
3289 	bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
3999 				    intel_dp->dpcd[DP_DPCD_REV]);
4519 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
4542 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
4586 	 * the value that was stored earlier or dpcd read failed
4636 	u8 *dpcd = intel_dp->dpcd;
4648 	if (!drm_dp_is_branch(dpcd))
4666 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {
4672 		type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
4744 		drm_dp_downstream_max_bpc(intel_dp->dpcd,
4748 		drm_dp_downstream_max_dotclock(intel_dp->dpcd,
4752 		drm_dp_downstream_min_tmds_clock(intel_dp->dpcd,
4756 		drm_dp_downstream_max_tmds_clock(intel_dp->dpcd,
4761 		drm_dp_get_pcon_max_frl_bw(intel_dp->dpcd,
4780 	    (!drm_dp_is_branch(intel_dp->dpcd) || intel_dp->dfp.ycbcr420_passthrough))
4801 		drm_dp_downstream_420_passthrough(intel_dp->dpcd,
4806 		drm_dp_downstream_444_to_420_conversion(intel_dp->dpcd,
4809 		drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
4987 						 intel_dp->dpcd,
5037 					      intel_dp->dpcd,
5561 		if (DISPLAY_VER(dev_priv) == 9 && drm_dp_is_branch(intel_dp->dpcd) &&
5562 		    (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_TYPE_MASK) ==