Lines Matching defs:cpu_transcoder
292 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
295 if (intel_de_wait_for_clear(dev_priv, TRANSCONF(cpu_transcoder),
304 enum transcoder cpu_transcoder, bool state)
314 power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
317 u32 val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
327 transcoder_name(cpu_transcoder), str_on_off(state),
396 enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
421 (enum pipe) cpu_transcoder);
431 reg = TRANSCONF(cpu_transcoder);
457 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
470 reg = TRANSCONF(cpu_transcoder);
487 intel_de_rmw(dev_priv, MTL_CHICKEN_TRANS(cpu_transcoder),
490 intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder),
1362 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1365 intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
1368 intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
1370 intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
1485 enum transcoder transcoder = crtc_state->cpu_transcoder;
1516 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1519 intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
1522 intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
1524 intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
1532 if (cpu_transcoder != TRANSCODER_EDP)
1533 intel_de_write(dev_priv, TRANS_MULT(cpu_transcoder),
1548 enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
1577 !transcoder_is_dsi(cpu_transcoder))
1733 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
1838 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1848 set_bit(POWER_DOMAIN_TRANSCODER(cpu_transcoder), mask->bits);
1867 set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), mask->bits);
1906 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1909 intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
1911 intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
2024 assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
2497 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
2528 intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder),
2539 intel_de_write(dev_priv, TRANS_VSYNCSHIFT(cpu_transcoder),
2542 intel_de_write(dev_priv, TRANS_HTOTAL(cpu_transcoder),
2545 intel_de_write(dev_priv, TRANS_HBLANK(cpu_transcoder),
2548 intel_de_write(dev_priv, TRANS_HSYNC(cpu_transcoder),
2552 intel_de_write(dev_priv, TRANS_VTOTAL(cpu_transcoder),
2555 intel_de_write(dev_priv, TRANS_VBLANK(cpu_transcoder),
2558 intel_de_write(dev_priv, TRANS_VSYNC(cpu_transcoder),
2566 if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP &&
2591 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
2598 return intel_de_read(dev_priv, TRANSCONF(cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW;
2600 return intel_de_read(dev_priv, TRANSCONF(cpu_transcoder)) & TRANSCONF_INTERLACE_MASK;
2608 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
2612 tmp = intel_de_read(dev_priv, TRANS_HTOTAL(cpu_transcoder));
2616 if (!transcoder_is_dsi(cpu_transcoder)) {
2617 tmp = intel_de_read(dev_priv, TRANS_HBLANK(cpu_transcoder));
2622 tmp = intel_de_read(dev_priv, TRANS_HSYNC(cpu_transcoder));
2626 tmp = intel_de_read(dev_priv, TRANS_VTOTAL(cpu_transcoder));
2631 if (!transcoder_is_dsi(cpu_transcoder)) {
2632 tmp = intel_de_read(dev_priv, TRANS_VBLANK(cpu_transcoder));
2636 tmp = intel_de_read(dev_priv, TRANS_VSYNC(cpu_transcoder));
2646 if (DISPLAY_VER(dev_priv) >= 13 && !transcoder_is_dsi(cpu_transcoder))
2649 intel_de_read(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder));
2689 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
2749 intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
2750 intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
2906 pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
2911 tmp = intel_de_read(dev_priv, TRANSCONF(pipe_config->cpu_transcoder));
3023 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
3079 intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
3080 intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
3087 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
3109 intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
3110 intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
3301 pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
3305 tmp = intel_de_read(dev_priv, TRANSCONF(pipe_config->cpu_transcoder));
3385 enum transcoder cpu_transcoder)
3391 power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
3394 tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
3492 enum transcoder cpu_transcoder;
3500 for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder,
3507 power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
3509 tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
3518 transcoder_name(cpu_transcoder));
3536 enabled_transcoders |= BIT(cpu_transcoder);
3540 cpu_transcoder = (enum transcoder) crtc->pipe;
3541 if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
3542 enabled_transcoders |= BIT(cpu_transcoder);
3547 cpu_transcoder = (enum transcoder)
3549 if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
3550 enabled_transcoders |= BIT(cpu_transcoder);
3609 pipe_config->cpu_transcoder = ffs(enabled_transcoders) - 1;
3612 POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
3615 if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) {
3616 tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
3622 tmp = intel_de_read(dev_priv, TRANSCONF(pipe_config->cpu_transcoder));
3633 enum transcoder cpu_transcoder;
3639 cpu_transcoder = TRANSCODER_DSI_A;
3641 cpu_transcoder = TRANSCODER_DSI_C;
3644 POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
3666 pipe_config->cpu_transcoder = cpu_transcoder;
3670 return transcoder_is_dsi(pipe_config->cpu_transcoder);
3717 if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
3721 if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder))
3728 TRANSCONF(pipe_config->cpu_transcoder));
3777 if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
3778 !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
3781 TRANS_MULT(pipe_config->cpu_transcoder)) + 1;
3786 if (!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
3788 MTL_CHICKEN_TRANS(pipe_config->cpu_transcoder) :
3789 CHICKEN_TRANS(pipe_config->cpu_transcoder));
4655 crtc_state->cpu_transcoder = (enum transcoder) crtc->pipe;
5207 PIPE_CONF_CHECK_I(cpu_transcoder);
5754 transcoders & BIT(new_crtc_state->cpu_transcoder) &&
6503 intel_cpu_transcoder_set_m1_n1(crtc, new_crtc_state->cpu_transcoder,
7900 enum transcoder cpu_transcoder = (enum transcoder)pipe;
7927 intel_de_write(dev_priv, TRANS_HTOTAL(cpu_transcoder),
7929 intel_de_write(dev_priv, TRANS_HBLANK(cpu_transcoder),
7931 intel_de_write(dev_priv, TRANS_HSYNC(cpu_transcoder),
7933 intel_de_write(dev_priv, TRANS_VTOTAL(cpu_transcoder),
7935 intel_de_write(dev_priv, TRANS_VBLANK(cpu_transcoder),
7937 intel_de_write(dev_priv, TRANS_VSYNC(cpu_transcoder),