Lines Matching defs:uint16_t
48 #ifndef uint16_t
49 typedef unsigned short uint16_t;
234 uint16_t structuresize;
246 uint16_t bios_segment_address;
247 uint16_t protectedmodeoffset;
248 uint16_t configfilenameoffset;
249 uint16_t crc_block_offset;
250 uint16_t vbios_bootupmessageoffset;
251 uint16_t int10_offset;
252 uint16_t pcibusdevinitcode;
253 uint16_t iobaseaddress;
254 uint16_t subsystem_vendor_id;
255 uint16_t subsystem_id;
256 uint16_t pci_info_offset;
257 uint16_t masterhwfunction_offset; //Offest for SW to get all command function offsets, Don't change the position
258 uint16_t masterdatatable_offset; //Offest for SW to get all data table offsets, Don't change the position
259 uint16_t reserved;
272 uint16_t asic_init; //Function
273 uint16_t cmd_function1; //used as an internal one
274 uint16_t cmd_function2; //used as an internal one
275 uint16_t cmd_function3; //used as an internal one
276 uint16_t digxencodercontrol; //Function
277 uint16_t cmd_function5; //used as an internal one
278 uint16_t cmd_function6; //used as an internal one
279 uint16_t cmd_function7; //used as an internal one
280 uint16_t cmd_function8; //used as an internal one
281 uint16_t cmd_function9; //used as an internal one
282 uint16_t setengineclock; //Function
283 uint16_t setmemoryclock; //Function
284 uint16_t setpixelclock; //Function
285 uint16_t enabledisppowergating; //Function
286 uint16_t cmd_function14; //used as an internal one
287 uint16_t cmd_function15; //used as an internal one
288 uint16_t cmd_function16; //used as an internal one
289 uint16_t cmd_function17; //used as an internal one
290 uint16_t cmd_function18; //used as an internal one
291 uint16_t cmd_function19; //used as an internal one
292 uint16_t cmd_function20; //used as an internal one
293 uint16_t cmd_function21; //used as an internal one
294 uint16_t cmd_function22; //used as an internal one
295 uint16_t cmd_function23; //used as an internal one
296 uint16_t cmd_function24; //used as an internal one
297 uint16_t cmd_function25; //used as an internal one
298 uint16_t cmd_function26; //used as an internal one
299 uint16_t cmd_function27; //used as an internal one
300 uint16_t cmd_function28; //used as an internal one
301 uint16_t cmd_function29; //used as an internal one
302 uint16_t cmd_function30; //used as an internal one
303 uint16_t cmd_function31; //used as an internal one
304 uint16_t cmd_function32; //used as an internal one
305 uint16_t cmd_function33; //used as an internal one
306 uint16_t blankcrtc; //Function
307 uint16_t enablecrtc; //Function
308 uint16_t cmd_function36; //used as an internal one
309 uint16_t cmd_function37; //used as an internal one
310 uint16_t cmd_function38; //used as an internal one
311 uint16_t cmd_function39; //used as an internal one
312 uint16_t cmd_function40; //used as an internal one
313 uint16_t getsmuclockinfo; //Function
314 uint16_t selectcrtc_source; //Function
315 uint16_t cmd_function43; //used as an internal one
316 uint16_t cmd_function44; //used as an internal one
317 uint16_t cmd_function45; //used as an internal one
318 uint16_t setdceclock; //Function
319 uint16_t getmemoryclock; //Function
320 uint16_t getengineclock; //Function
321 uint16_t setcrtc_usingdtdtiming; //Function
322 uint16_t externalencodercontrol; //Function
323 uint16_t cmd_function51; //used as an internal one
324 uint16_t cmd_function52; //used as an internal one
325 uint16_t cmd_function53; //used as an internal one
326 uint16_t processi2cchanneltransaction;//Function
327 uint16_t cmd_function55; //used as an internal one
328 uint16_t cmd_function56; //used as an internal one
329 uint16_t cmd_function57; //used as an internal one
330 uint16_t cmd_function58; //used as an internal one
331 uint16_t cmd_function59; //used as an internal one
332 uint16_t computegpuclockparam; //Function
333 uint16_t cmd_function61; //used as an internal one
334 uint16_t cmd_function62; //used as an internal one
335 uint16_t dynamicmemorysettings; //Function function
336 uint16_t memorytraining; //Function function
337 uint16_t cmd_function65; //used as an internal one
338 uint16_t cmd_function66; //used as an internal one
339 uint16_t setvoltage; //Function
340 uint16_t cmd_function68; //used as an internal one
341 uint16_t readefusevalue; //Function
342 uint16_t cmd_function70; //used as an internal one
343 uint16_t cmd_function71; //used as an internal one
344 uint16_t cmd_function72; //used as an internal one
345 uint16_t cmd_function73; //used as an internal one
346 uint16_t cmd_function74; //used as an internal one
347 uint16_t cmd_function75; //used as an internal one
348 uint16_t dig1transmittercontrol; //Function
349 uint16_t cmd_function77; //used as an internal one
350 uint16_t processauxchanneltransaction;//Function
351 uint16_t cmd_function79; //used as an internal one
352 uint16_t getvoltageinfo; //Function
366 uint16_t ws_in_bytes:8; //[7:0]=Size of workspace in Bytes (in multiple of a dword),
367 uint16_t ps_in_bytes:7; //[14:8]=Size of parameter space in Bytes (multiple of a dword),
368 uint16_t updated_by_util:1; //[15]=flag to indicate the function is updated by util
390 uint16_t utilitypipeline; /* Offest for the utility to get parser info,Don't change this position!*/
391 uint16_t multimedia_info;
392 uint16_t smc_dpm_info;
393 uint16_t sw_datatable3;
394 uint16_t firmwareinfo; /* Shared by various SW components */
395 uint16_t sw_datatable5;
396 uint16_t lcd_info; /* Shared by various SW components */
397 uint16_t sw_datatable7;
398 uint16_t smu_info;
399 uint16_t sw_datatable9;
400 uint16_t sw_datatable10;
401 uint16_t vram_usagebyfirmware; /* Shared by various SW components */
402 uint16_t gpio_pin_lut; /* Shared by various SW components */
403 uint16_t sw_datatable13;
404 uint16_t gfx_info;
405 uint16_t powerplayinfo; /* Shared by various SW components */
406 uint16_t sw_datatable16;
407 uint16_t sw_datatable17;
408 uint16_t sw_datatable18;
409 uint16_t sw_datatable19;
410 uint16_t sw_datatable20;
411 uint16_t sw_datatable21;
412 uint16_t displayobjectinfo; /* Shared by various SW components */
413 uint16_t indirectioaccess; /* used as an internal one */
414 uint16_t umc_info; /* Shared by various SW components */
415 uint16_t sw_datatable25;
416 uint16_t sw_datatable26;
417 uint16_t dce_info; /* Shared by various SW components */
418 uint16_t vram_info; /* Shared by various SW components */
419 uint16_t sw_datatable29;
420 uint16_t integratedsysteminfo; /* Shared by various SW components */
421 uint16_t asic_profiling_info; /* Shared by various SW components */
422 uint16_t voltageobject_info; /* shared by various SW components */
423 uint16_t sw_datatable33;
424 uint16_t sw_datatable34;
437 uint16_t pixclk;
438 uint16_t h_active;
439 uint16_t h_blanking_time;
440 uint16_t v_active;
441 uint16_t v_blanking_time;
442 uint16_t h_sync_offset;
443 uint16_t h_sync_width;
444 uint16_t v_sync_offset;
445 uint16_t v_syncwidth;
446 uint16_t reserved;
447 uint16_t reserved0;
450 uint16_t miscinfo;
487 uint16_t bootup_vddc_mv;
488 uint16_t bootup_vddci_mv;
489 uint16_t bootup_mvddc_mv;
490 uint16_t bootup_vddgfx_mv;
526 uint16_t bootup_vddc_mv;
527 uint16_t bootup_vddci_mv;
528 uint16_t bootup_mvddc_mv;
529 uint16_t bootup_vddgfx_mv;
539 uint16_t bootup_mvddq_mv;
540 uint16_t bootup_mvpp_mv;
554 uint16_t bootup_vddc_mv;
555 uint16_t bootup_vddci_mv;
556 uint16_t bootup_mvddc_mv;
557 uint16_t bootup_vddgfx_mv;
567 uint16_t bootup_mvddq_mv;
568 uint16_t bootup_mvpp_mv;
582 uint16_t bootup_vddc_mv;
583 uint16_t bootup_vddci_mv;
584 uint16_t bootup_mvddc_mv;
585 uint16_t bootup_vddgfx_mv;
595 uint16_t bootup_mvddq_mv;
596 uint16_t bootup_mvpp_mv;
600 uint16_t hw_bootup_vddgfx_mv; // hw default vddgfx voltage level decide by board strap
601 uint16_t hw_bootup_vddc_mv; // hw default vddc voltage level decide by board strap
602 uint16_t hw_bootup_mvddc_mv; // hw default mvddc voltage level decide by board strap
603 uint16_t hw_bootup_vddci_mv; // hw default vddci voltage level decide by board strap
623 uint16_t backlight_pwm;
624 uint16_t special_handle_cap;
625 uint16_t panel_misc;
626 uint16_t lvds_max_slink_pclk;
627 uint16_t lvds_ss_percentage;
628 uint16_t lvds_ss_rate_10hz;
755 uint16_t used_by_firmware_in_kb;
756 uint16_t used_by_driver_in_kb;
762 uint16_t used_by_firmware_in_kb;
763 uint16_t reserved;
814 uint16_t connector_caps; //01b if internal display is checked; 10b if internal BL is checked; 0 of Not
821 uint16_t reserved;
925 uint16_t connectorobjid;
979 uint16_t display_objid; //Connector Object ID or Misc Object ID
980 uint16_t disp_recordoffset;
981 uint16_t encoderobjid; //first encoder closer to the connector, could be either an external or intenal encoder
982 uint16_t extencoderobjid; //2nd encoder after the first encoder, from the connector point of view;
983 uint16_t encoder_recordoffset;
984 uint16_t extencoder_recordoffset;
985 uint16_t device_tag; //a supported device vector, each display path starts with this.the paths are enumerated in the way of priority, a path appears first
991 uint16_t display_objid; //Connector Object ID or Misc Object ID
992 uint16_t disp_recordoffset;
993 uint16_t encoderobjid; //first encoder closer to the connector, could be either an external or intenal encoder
994 uint16_t reserved1; //only on USBC case, otherwise always = 0
995 uint16_t reserved2; //reserved and always = 0
996 uint16_t reserved3; //reserved and always = 0
999 uint16_t device_tag;
1000 uint16_t reserved4; //reserved and always = 0
1006 uint16_t supporteddevices;
1014 uint16_t supporteddevices;
1032 uint16_t dce_refclk_10khz;
1033 uint16_t i2c_engine_refclk_10khz;
1034 uint16_t dvi_ss_percentage; // in unit of 0.001%
1035 uint16_t dvi_ss_rate_10hz;
1036 uint16_t hdmi_ss_percentage; // in unit of 0.001%
1037 uint16_t hdmi_ss_rate_10hz;
1038 uint16_t dp_ss_percentage; // in unit of 0.001%
1039 uint16_t dp_ss_rate_10hz;
1046 uint16_t dpphy_refclk_10khz;
1047 uint16_t reserved2;
1064 uint16_t dce_refclk_10khz;
1065 uint16_t i2c_engine_refclk_10khz;
1066 uint16_t dvi_ss_percentage; // in unit of 0.001%
1067 uint16_t dvi_ss_rate_10hz;
1068 uint16_t hdmi_ss_percentage; // in unit of 0.001%
1069 uint16_t hdmi_ss_rate_10hz;
1070 uint16_t dp_ss_percentage; // in unit of 0.001%
1071 uint16_t dp_ss_rate_10hz;
1080 uint16_t dpphy_refclk_10khz;
1081 uint16_t reserved2;
1098 uint16_t dce_refclk_10khz;
1099 uint16_t i2c_engine_refclk_10khz;
1100 uint16_t dvi_ss_percentage; // in unit of 0.001%
1101 uint16_t dvi_ss_rate_10hz;
1102 uint16_t hdmi_ss_percentage; // in unit of 0.001%
1103 uint16_t hdmi_ss_rate_10hz;
1104 uint16_t dp_ss_percentage; // in unit of 0.001%
1105 uint16_t dp_ss_rate_10hz;
1114 uint16_t dpphy_refclk_10khz;
1115 uint16_t reserved2;
1131 uint16_t dce_refclk_10khz;
1132 uint16_t i2c_engine_refclk_10khz;
1133 uint16_t dvi_ss_percentage; // in unit of 0.001%
1134 uint16_t dvi_ss_rate_10hz;
1135 uint16_t hdmi_ss_percentage; // in unit of 0.001%
1136 uint16_t hdmi_ss_rate_10hz;
1137 uint16_t dp_ss_percentage; // in unit of 0.001%
1138 uint16_t dp_ss_rate_10hz;
1147 uint16_t dpphy_refclk_10khz;
1148 uint16_t hw_chip_id;
1162 uint16_t dc_golden_table_offset; // point of struct of atom_dc_golden_table_vxx
1163 uint16_t dc_golden_table_ver;
1198 uint16_t dce_refclk_10khz;
1199 uint16_t i2c_engine_refclk_10khz;
1200 uint16_t dvi_ss_percentage; // in unit of 0.001%
1201 uint16_t dvi_ss_rate_10hz;
1202 uint16_t hdmi_ss_percentage; // in unit of 0.001%
1203 uint16_t hdmi_ss_rate_10hz;
1204 uint16_t dp_ss_percentage; // in unit of 0.001%
1205 uint16_t dp_ss_rate_10hz;
1218 uint16_t dpphy_refclk_10khz;
1219 uint16_t hw_chip_id;
1236 uint16_t dc_golden_table_offset; // point of struct of atom_dc_golden_table_vxx
1237 uint16_t dc_golden_table_ver;
1257 uint16_t device_tag; //A bit vector to show what devices are supported
1258 uint16_t device_acpi_enum; //16bit device ACPI id.
1259 uint16_t connectorobjid; //A physical connector for displays to plug in, using object connector definitions
1262 uint16_t ext_encoder_objid; //external encoder object id
1265 uint16_t caps;
1266 uint16_t reserved;
1306 uint16_t param[3];
1337 uint16_t margindeemph; //COMMON_MAR_DEEMPH_NOM[7:0]tx_margin_nom [15:8]deemph_gen1_nom
1346 uint16_t margindeemph; //COMMON_MAR_DEEMPH_NOM[7:0]tx_margin_nom [15:8]deemph_gen1_nom
1354 uint16_t table_size; // size of atom_14nm_dpphy_dp_tuningset
1355 uint16_t reserved;
1361 uint16_t pcie_phy_tmds_hdmi_macro_settings_offset; // offset of PCIEPhyTMDSHDMIMacroSettingsTbl
1362 uint16_t uniphy_vs_emph_lookup_table_offset; // offset of UniphyVSEmphLookUpTbl
1363 uint16_t uniphy_xbar_settings_table_offset; // offset of UniphyXbarSettingsTbl
1371 uint16_t common_mar_deemph_nom__margin_deemph_val;
1402 uint16_t table_size; // size of atom_14nm_dpphy_dp_setting
1403 uint16_t reserved;
1427 uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
1428 uint16_t gpuclk_ss_type;
1429 uint16_t lvds_ss_percentage; //unit of 0.001%, 1000 mean 1%
1430 uint16_t lvds_ss_rate_10hz;
1431 uint16_t hdmi_ss_percentage; //unit of 0.001%, 1000 mean 1%
1432 uint16_t hdmi_ss_rate_10hz;
1433 uint16_t dvi_ss_percentage; //unit of 0.001%, 1000 mean 1%
1434 uint16_t dvi_ss_rate_10hz;
1435 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1436 uint16_t lvds_misc; // enum of atom_sys_info_lvds_misc_def
1437 uint16_t backlight_pwm_hz; // pwm frequency in hz
1476 uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
1477 uint16_t gpuclk_ss_type;
1478 uint16_t lvds_ss_percentage; //unit of 0.001%, 1000 mean 1%
1479 uint16_t lvds_ss_rate_10hz;
1480 uint16_t hdmi_ss_percentage; //unit of 0.001%, 1000 mean 1%
1481 uint16_t hdmi_ss_rate_10hz;
1482 uint16_t dvi_ss_percentage; //unit of 0.001%, 1000 mean 1%
1483 uint16_t dvi_ss_rate_10hz;
1484 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1485 uint16_t lvds_misc; // enum of atom_sys_info_lvds_misc_def
1486 uint16_t backlight_pwm_hz; // pwm frequency in hz
1521 uint16_t edp_backlight_pwm_hz;
1522 uint16_t edp_ss_percentage;
1523 uint16_t edp_ss_rate_10hz;
1524 uint16_t reserved1;
1542 uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
1543 uint16_t gpuclk_ss_type;
1544 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1611 uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
1612 uint16_t gpuclk_ss_type;
1613 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1648 uint16_t gpuclk_ss_percentage; // unit of 0.001%, 1000 mean 1%
1649 uint16_t gpuclk_ss_type;
1650 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1792 uint16_t gcgoldenoffset;
1817 uint16_t gcgoldenoffset;
1818 uint16_t gc_num_gprs;
1819 uint16_t gc_gsprim_buff_depth;
1820 uint16_t gc_parameter_cache_depth;
1821 uint16_t gc_wave_size;
1822 uint16_t gc_max_waves_per_simd;
1823 uint16_t gc_lds_size;
1852 uint16_t gcgoldenoffset;
1853 uint16_t gc_num_gprs;
1854 uint16_t gc_gsprim_buff_depth;
1855 uint16_t gc_parameter_cache_depth;
1856 uint16_t gc_wave_size;
1857 uint16_t gc_max_waves_per_simd;
1858 uint16_t gc_lds_size;
1918 uint16_t sclk_ss_percentage;
1919 uint16_t sclk_ss_rate_10hz;
1920 uint16_t gpuclk_ss_percentage; // in unit of 0.001%
1921 uint16_t gpuclk_ss_rate_10hz;
1939 uint16_t sclk_ss_percentage;
1940 uint16_t sclk_ss_rate_10hz;
1941 uint16_t gpuclk_ss_percentage; // in unit of 0.001%
1942 uint16_t gpuclk_ss_rate_10hz;
1954 uint16_t smugoldenoffset;
1972 uint16_t sclk_ss_percentage;
1973 uint16_t sclk_ss_rate_10hz;
1974 uint16_t gpuclk_ss_percentage; // in unit of 0.001%
1975 uint16_t gpuclk_ss_rate_10hz;
1987 uint16_t smugoldenoffset;
2001 uint16_t waflclk_ss_percentage; // in unit of 0.001%
2002 uint16_t smuinitoffset;
2013 uint16_t sclk_ss_percentage;
2014 uint16_t sclk_ss_rate_10hz;
2015 uint16_t gpuclk_ss_percentage; // in unit of 0.001%
2016 uint16_t gpuclk_ss_rate_10hz;
2022 uint16_t smugoldenoffset;
2036 uint16_t waflclk_ss_percentage; // in unit of 0.001%
2037 uint16_t smuinitoffset;
2070 uint16_t sclk_ss_percentage;
2071 uint16_t sclk_ss_rate_10hz;
2072 uint16_t gpuclk_ss_percentage;
2073 uint16_t gpuclk_ss_rate_10hz;
2079 uint16_t smugoldenoffset;
2093 uint16_t waflclk_ss_percentage;
2094 uint16_t smuinitoffset;
2134 uint16_t bootup_vddusr_mv;
2148 uint16_t waflclk_ss_percentage;
2149 uint16_t smuinitoffset;
2210 uint16_t maxvoltagestepgfx;
2211 uint16_t maxvoltagestepsoc;
2222 uint16_t gfxmaxcurrent;
2226 uint16_t socmaxcurrent;
2230 uint16_t mem0maxcurrent;
2234 uint16_t mem1maxcurrent;
2255 uint16_t pllgfxclkspreadfreq;
2259 uint16_t uclkspreadfreq;
2263 uint16_t socclkspreadfreq;
2267 uint16_t acggfxclkspreadfreq;
2298 uint16_t maxvoltagestepgfx;
2299 uint16_t maxvoltagestepsoc;
2311 uint16_t gfxmaxcurrent;
2315 uint16_t socmaxcurrent;
2319 uint16_t mem0maxcurrent;
2323 uint16_t mem1maxcurrent;
2344 uint16_t pllgfxclkspreadfreq;
2348 uint16_t uclkspreadfreq;
2352 uint16_t fclkspreadfreq;
2356 uint16_t fllgfxclkspreadfreq;
2376 uint16_t maxvoltagestepgfx;
2377 uint16_t maxvoltagestepsoc;
2389 uint16_t gfxmaxcurrent;
2393 uint16_t socmaxcurrent;
2397 uint16_t mem0maxcurrent;
2401 uint16_t mem1maxcurrent;
2425 uint16_t pllgfxclkspreadfreq;
2430 uint16_t uclkspreadfreq;
2435 uint16_t fclkspreadfreq;
2440 uint16_t fllgfxclkspreadfreq;
2503 uint16_t MaxVoltageStepGfx; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
2504 uint16_t MaxVoltageStepSoc; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
2517 uint16_t GfxMaxCurrent; // in Amps
2520 uint16_t SocMaxCurrent; // in Amps
2524 uint16_t Mem0MaxCurrent; // in Amps
2528 uint16_t Mem1MaxCurrent; // in Amps
2552 uint16_t PllGfxclkSpreadFreq; // kHz
2557 uint16_t DfllGfxclkSpreadFreq; // kHz
2562 uint16_t UclkSpreadFreq; // kHz
2567 uint16_t SocclkSpreadFreq; // kHz
2570 uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
2571 uint16_t BoardPadding;
2586 uint16_t maxvoltagestepgfx; // in mv(q2) max voltage step that smu will request. multiple steps are taken if voltage change exceeds this value.
2587 uint16_t maxvoltagestepsoc; // in mv(q2) max voltage step that smu will request. multiple steps are taken if voltage change exceeds this value.
2599 uint16_t gfxmaxcurrent; // in amps
2603 uint16_t socmaxcurrent; // in amps
2607 uint16_t memmaxcurrent; // in amps
2611 uint16_t boardmaxcurrent; // in amps
2624 uint16_t pllgfxclkspreadfreq; // khz
2629 uint16_t uclkspreadfreq; // khz
2634 uint16_t fclkspreadfreq; // khz
2640 uint16_t fllgfxclkspreadfreq; // khz
2652 uint16_t totalboardpower; //only needed for tcp estimated case, where tcp = tgp+total board power
2653 uint16_t boardpadding;
2659 uint16_t xgmifclkfreq[4];
2660 uint16_t xgmisocvoltage[4];
2674 uint16_t MaxVoltageStepGfx; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
2675 uint16_t MaxVoltageStepSoc; // In mV(Q2) Max voltage step that SMU will request. Multiple steps are taken if voltage change exceeds this value.
2688 uint16_t GfxMaxCurrent; // in Amps
2691 uint16_t SocMaxCurrent; // in Amps
2695 uint16_t Mem0MaxCurrent; // in Amps
2699 uint16_t Mem1MaxCurrent; // in Amps
2723 uint16_t PllGfxclkSpreadFreq; // kHz
2728 uint16_t DfllGfxclkSpreadFreq; // kHz
2733 uint16_t UclkSpreadFreq; // kHz
2738 uint16_t SocclkSpreadFreq; // kHz
2741 uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
2742 uint16_t BoardPadding;
2750 uint16_t GpioPadding;
2755 uint16_t LedEnableMask;
2807 uint16_t GfxMaxCurrent; // in Amps
2811 uint16_t SocMaxCurrent; // in Amps
2815 uint16_t Mem0MaxCurrent; // in Amps
2819 uint16_t Mem1MaxCurrent; // in Amps
2851 uint16_t PllGfxclkSpreadFreq; // kHz
2856 uint16_t DfllGfxclkSpreadFreq; // kHz
2861 uint16_t UclkSpreadFreq; // kHz
2866 uint16_t FclkSpreadFreq; // kHz
2875 uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
2876 uint16_t BoardPowerPadding;
2882 uint16_t XgmiFclkFreq [4];
2883 uint16_t XgmiSocVoltage [4];
2897 uint16_t GfxMaxCurrent; // in Amps
2901 uint16_t SocMaxCurrent; // in Amps
2905 uint16_t MemMaxCurrent; // in Amps
2909 uint16_t BoardMaxCurrent; // in Amps
2926 uint16_t UclkSpreadFreq; // kHz
2931 uint16_t FclkSpreadFreq; // kHz
2939 uint16_t spare5;
2957 uint16_t avfs_meannsigma_dc_tol_sigma;
2958 uint16_t avfs_meannsigma_platform_mean;
2959 uint16_t avfs_meannsigma_platform_sigma;
2972 uint16_t max_voltage_0_25mv;
2977 uint16_t psm_age_comfactor;
3001 uint16_t avfs_meannsigma_dc_tol_sigma;
3002 uint16_t avfs_meannsigma_platform_mean;
3003 uint16_t avfs_meannsigma_platform_sigma;
3016 uint16_t max_voltage_0_25mv;
3021 uint16_t psm_age_comfactor;
3070 uint16_t uvd_enc_max_input_width_pixels;
3071 uint16_t uvd_enc_max_input_height_pixels;
3072 uint16_t vce_enc_max_input_width_pixels;
3073 uint16_t vce_enc_max_input_height_pixels;
3090 uint16_t umc_reg_init_offset;
3091 uint16_t customer_ucode_name_offset;
3092 uint16_t mclk_ss_percentage;
3093 uint16_t mclk_ss_rate_10hz;
3117 uint16_t umc_reg_init_offset;
3118 uint16_t customer_ucode_name_offset;
3119 uint16_t mclk_ss_percentage;
3120 uint16_t mclk_ss_rate_10hz;
3127 uint16_t umcgoldenoffset;
3128 uint16_t densitygoldenoffset;
3137 uint16_t umc_reg_init_offset;
3138 uint16_t customer_ucode_name_offset;
3139 uint16_t mclk_ss_percentage;
3140 uint16_t mclk_ss_rate_10hz;
3147 uint16_t umcgoldenoffset;
3148 uint16_t densitygoldenoffset;
3191 uint16_t reserved[3];
3192 uint16_t mem_voltage; // mem_voltage
3193 uint16_t vram_module_size; // Size of atom_vram_module_v9
3209 uint16_t mem_adjust_tbloffset; // offset of atom_umc_init_reg_block structure for memory vendor specific UMC adjust setting
3210 uint16_t mem_clk_patch_tbloffset; // offset of atom_umc_init_reg_block structure for memory clock specific UMC setting
3211 uint16_t mc_adjust_pertile_tbloffset; // offset of atom_umc_init_reg_block structure for Per Byte Offset Preset Settings
3212 uint16_t mc_phyinit_tbloffset; // offset of atom_umc_init_reg_block structure for MC phy init set
3213 uint16_t dram_data_remap_tbloffset; // reserved for now
3214 uint16_t tmrs_seq_offset; // offset of HBM tmrs
3215 uint16_t post_ucode_init_offset; // offset of atom_umc_init_reg_block structure for MC phy init after MC uCode complete umc init
3216 uint16_t vram_rsd2;
3234 uint16_t dram_info_offset;
3235 uint16_t mem_tuning_offset;
3236 uint16_t tmrs_seq_offset;
3237 uint16_t reserved1;
3245 uint16_t mem_tuning_table_offset;
3246 uint16_t dram_info_table_offset;
3247 uint16_t tmrs_table_offset;
3248 uint16_t mc_init_table_offset;
3249 uint16_t dram_data_remap_table_offset;
3250 uint16_t umc_emuinittable_offset;
3251 uint16_t reserved_sub_table_offset[2];
3303 uint16_t umc_reg_num;
3304 uint16_t reserved;
3314 uint16_t reserved[3];
3315 uint16_t mem_voltage; // mem_voltage
3316 uint16_t vram_module_size; // Size of atom_vram_module_v9
3327 uint16_t gddr6_mr10; // gddr6 mode register10 value
3328 uint16_t gddr6_mr1; // gddr6 mode register1 value
3329 uint16_t gddr6_mr2; // gddr6 mode register2 value
3330 uint16_t gddr6_mr7; // gddr6 mode register7 value
3336 uint16_t mem_adjust_tbloffset; // offset of atom_umc_init_reg_block structure for memory vendor specific UMC adjust setting
3337 uint16_t mem_clk_patch_tbloffset; // offset of atom_umc_init_reg_block structure for memory clock specific UMC setting
3338 uint16_t mc_adjust_pertile_tbloffset; // offset of atom_umc_init_reg_block structure for Per Byte Offset Preset Settings
3339 uint16_t mc_phyinit_tbloffset; // offset of atom_umc_init_reg_block structure for MC phy init set
3340 uint16_t dram_data_remap_tbloffset; // reserved for now
3341 uint16_t reserved; // offset of reserved
3342 uint16_t post_ucode_init_offset; // offset of atom_umc_init_reg_block structure for MC phy init after MC uCode complete umc init
3343 uint16_t vram_rsd2;
3355 uint16_t mem_voltage; // mem_voltage
3356 uint16_t vram_module_size; // Size of atom_vram_module_v9
3363 uint16_t reserved[4]; // reserved
3368 uint16_t gddr6_mr10; // gddr6 mode register10 value
3369 uint16_t gddr6_mr0; // gddr6 mode register0 value
3370 uint16_t gddr6_mr1; // gddr6 mode register1 value
3371 uint16_t gddr6_mr2; // gddr6 mode register2 value
3372 uint16_t gddr6_mr4; // gddr6 mode register4 value
3373 uint16_t gddr6_mr7; // gddr6 mode register7 value
3374 uint16_t gddr6_mr8; // gddr6 mode register8 value
3385 uint16_t tREFI;
3460 uint16_t mem_adjust_tbloffset; // offset of atom_umc_init_reg_block structure for memory vendor specific UMC adjust settings
3461 uint16_t gddr6_ac_timing_offset; // offset of atom_gddr6_ac_timing_v2_5 structure for memory clock specific UMC settings
3462 uint16_t mc_adjust_pertile_tbloffset; // offset of atom_umc_init_reg_block structure for Per Byte Offset Preset Settings
3463 uint16_t mc_phyinit_tbloffset; // offset of atom_umc_init_reg_block structure for MC phy init set
3464 uint16_t dram_data_remap_tbloffset; // offset of atom_gddr6_dram_data_remap array to indicate DRAM data lane to GPU mapping
3465 uint16_t reserved; // offset of reserved
3466 uint16_t post_ucode_init_offset; // offset of atom_umc_init_reg_block structure for MC phy init after MC uCode complete umc init
3467 uint16_t strobe_mode_patch_tbloffset; // offset of atom_umc_init_reg_block structure for Strobe Mode memory clock specific UMC settings
3477 uint16_t mem_adjust_tbloffset;
3478 uint16_t mem_clk_patch_tbloffset;
3479 uint16_t mc_adjust_pertile_tbloffset;
3480 uint16_t mc_phyinit_tbloffset;
3481 uint16_t dram_data_remap_tbloffset;
3482 uint16_t tmrs_seq_offset;
3483 uint16_t post_ucode_init_offset;
3484 uint16_t vram_rsd2;
3498 uint16_t i2c_reg_index; // i2c register address, can be up to 16bit
3499 uint16_t i2c_reg_data; // i2c register data, can be up to 16bit
3505 uint16_t object_size; //Size of Object
3543 uint16_t voltage_level_mv; // The corresponding Voltage Value, in mV
3566 uint16_t reserved1;
3720 uint16_t vlevel_mv; /* real voltage level in unit of mv or Voltage Phase (0, 1, 2, .. ) */
3766 uint16_t pll_ss_slew_frac;
3782 uint16_t efuse_start_index;
4094 uint16_t reserved;
4136 uint16_t h_size;
4137 uint16_t h_blanking_time;
4138 uint16_t v_size;
4139 uint16_t v_blanking_time;
4140 uint16_t h_syncoffset;
4141 uint16_t h_syncwidth;
4142 uint16_t v_syncoffset;
4143 uint16_t v_syncwidth;
4144 uint16_t modemiscinfo;
4163 uint16_t i2c_data_out;
4193 uint16_t aux_request;
4194 uint16_t dataout;
4406 uint16_t pixelclock_10khz; // pixel clock in 10Khz, valid when ucAction=SETUP/ENABLE_OUTPUT
4481 uint16_t vendorid; //0x58
4482 uint16_t deviceid; //0x5A
4483 uint16_t ssvid; //0x5C
4484 uint16_t ssid; //0x5E