Lines Matching defs:wptr
620 * Get the current wptr from the hardware (VEGA10+).
625 u64 wptr;
629 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr));
630 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
632 wptr = RREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR_HI);
633 wptr = wptr << 32;
634 wptr |= RREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR);
635 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n",
636 ring->me, wptr);
639 return wptr >> 2;
647 * Write the wptr back to the hardware (VEGA10+).
659 "lower_32_bits(ring->wptr << 2) == 0x%08x "
660 "upper_32_bits(ring->wptr << 2) == 0x%08x\n",
662 lower_32_bits(ring->wptr << 2),
663 upper_32_bits(ring->wptr << 2));
665 WRITE_ONCE(*wb, (ring->wptr << 2));
667 ring->doorbell_index, ring->wptr << 2);
668 WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
674 lower_32_bits(ring->wptr << 2),
676 upper_32_bits(ring->wptr << 2));
678 lower_32_bits(ring->wptr << 2));
680 upper_32_bits(ring->wptr << 2));
689 * Get the current wptr from the hardware (VEGA10+).
694 u64 wptr;
698 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr));
700 wptr = RREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR_HI);
701 wptr = wptr << 32;
702 wptr |= RREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR);
705 return wptr >> 2;
713 * Write the wptr back to the hardware (VEGA10+).
723 WRITE_ONCE(*wb, (ring->wptr << 2));
724 WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
726 uint64_t wptr = ring->wptr << 2;
729 lower_32_bits(wptr));
731 upper_32_bits(wptr));
766 sdma_v4_0_ring_insert_nop(ring, (2 - lower_32_bits(ring->wptr)) & 7);
1073 ring->wptr = 0;
1075 /* before programing wptr to a less value, need set minor_ptr_update first */
1091 /* set minor_ptr_update to 0 after wptr programed */
1094 /* setup the wptr shadow polling */
1158 ring->wptr = 0;
1160 /* before programing wptr to a less value, need set minor_ptr_update first */
1177 /* set minor_ptr_update to 0 after wptr programed */
1180 /* setup the wptr shadow polling */