Lines Matching defs:level

37 	unsigned int level;
41 * amdgpu_vm_pt_level_shift - return the addr shift for each level
44 * @level: VMPT level
47 * The number of bits the pfn needs to be right shifted for a level.
50 unsigned int level)
52 switch (level) {
56 return 9 * (AMDGPU_VM_PDB0 - level) +
69 * @level: VMPT level
75 unsigned int level)
80 if (level == adev->vm_manager.root_level)
84 else if (level != AMDGPU_VM_PTB)
112 * @level: VMPT level
118 unsigned int level)
120 if (level <= adev->vm_manager.root_level)
122 else if (level != AMDGPU_VM_PTB)
132 * @level: VMPT level
138 unsigned int level)
140 return AMDGPU_GPU_PAGE_ALIGN(amdgpu_vm_pt_num_entries(adev, level) * 8);
179 cursor->level = adev->vm_manager.root_level;
197 if ((cursor->level == AMDGPU_VM_PTB) || !cursor->entry ||
201 mask = amdgpu_vm_pt_entries_mask(adev, cursor->level);
202 shift = amdgpu_vm_pt_level_shift(adev, cursor->level);
204 ++cursor->level;
233 shift = amdgpu_vm_pt_level_shift(adev, cursor->level - 1);
234 num_entries = amdgpu_vm_pt_num_entries(adev, cursor->level - 1);
260 --cursor->level;
378 unsigned int level = adev->vm_manager.root_level;
389 ++level;
391 ++level;
452 if (level != AMDGPU_VM_PTB) {
455 amdgpu_gmc_get_vm_pde(adev, level, &value, &flags);
470 if (level != AMDGPU_VM_PTB) {
473 amdgpu_gmc_get_vm_pde(adev, level,
498 * @level: the page table level
504 int level, bool immediate, struct amdgpu_bo_vm **vmbo,
515 bp.size = amdgpu_vm_pt_size(adev, level);
527 if (level < AMDGPU_VM_PTB)
528 num_entries = amdgpu_vm_pt_num_entries(adev, level);
559 bp.size = amdgpu_vm_pt_size(adev, level);
610 r = amdgpu_vm_pt_create(adev, vm, cursor->level, immediate, &pt,
689 * Free the page directory or page table level and all sub levels.
758 * amdgpu_vm_pde_update - update a single level in the hierarchy
772 unsigned int level;
778 for (level = 0, pbo = bo->parent; pbo; ++level)
781 level += params->adev->vm_manager.root_level;
782 amdgpu_gmc_get_pde_for_bo(entry->bo, level, &pt, &flags);
812 * Make sure to set the right flags for the PTEs at the desired level.
816 unsigned int level,
823 if (level != AMDGPU_VM_PTB) {
825 amdgpu_gmc_get_vm_pde(adev, level, &addr, &flags);
842 if (level == AMDGPU_VM_PTB)
970 shift = amdgpu_vm_pt_level_shift(adev, cursor.level);
971 parent_shift = amdgpu_vm_pt_level_shift(adev, cursor.level - 1);
979 if (cursor.level != AMDGPU_VM_PTB) {
985 /* We can't use this level when the fragment size is
993 * shift we should go up one level and check it again.
1007 * level.
1020 mask = amdgpu_vm_pt_entries_mask(adev, cursor.level);
1032 /* This can happen when we set higher level PDs to
1043 cursor.level, pe_start, dst,
1078 /* or just move on to the next on the same level. */