Lines Matching defs:ib
442 struct amdgpu_ib *ib;
463 ib = &job->ibs[0];
468 ib->length_dw = 0;
469 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */
470 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */
471 ib->ptr[ib->length_dw++] = handle;
474 ib->ptr[ib->length_dw++] = 0x00000040; /* len */
476 ib->ptr[ib->length_dw++] = 0x00000030; /* len */
477 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */
478 ib->ptr[ib->length_dw++] = 0x00000000;
479 ib->ptr[ib->length_dw++] = 0x00000042;
480 ib->ptr[ib->length_dw++] = 0x0000000a;
481 ib->ptr[ib->length_dw++] = 0x00000001;
482 ib->ptr[ib->length_dw++] = 0x00000080;
483 ib->ptr[ib->length_dw++] = 0x00000060;
484 ib->ptr[ib->length_dw++] = 0x00000100;
485 ib->ptr[ib->length_dw++] = 0x00000100;
486 ib->ptr[ib->length_dw++] = 0x0000000c;
487 ib->ptr[ib->length_dw++] = 0x00000000;
489 ib->ptr[ib->length_dw++] = 0x00000000;
490 ib->ptr[ib->length_dw++] = 0x00000000;
491 ib->ptr[ib->length_dw++] = 0x00000000;
492 ib->ptr[ib->length_dw++] = 0x00000000;
495 ib->ptr[ib->length_dw++] = 0x00000014; /* len */
496 ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */
497 ib->ptr[ib->length_dw++] = upper_32_bits(addr);
498 ib->ptr[ib->length_dw++] = addr;
499 ib->ptr[ib->length_dw++] = 0x00000001;
501 for (i = ib->length_dw; i < ib_size_dw; ++i)
502 ib->ptr[i] = 0x0;
534 struct amdgpu_ib *ib;
546 ib = &job->ibs[0];
549 ib->length_dw = 0;
550 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */
551 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */
552 ib->ptr[ib->length_dw++] = handle;
554 ib->ptr[ib->length_dw++] = 0x00000020; /* len */
555 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
556 ib->ptr[ib->length_dw++] = 0xffffffff; /* next task info, set to 0xffffffff if no */
557 ib->ptr[ib->length_dw++] = 0x00000001; /* destroy session */
558 ib->ptr[ib->length_dw++] = 0x00000000;
559 ib->ptr[ib->length_dw++] = 0x00000000;
560 ib->ptr[ib->length_dw++] = 0xffffffff; /* feedback is not needed, set to 0xffffffff and firmware will not output feedback */
561 ib->ptr[ib->length_dw++] = 0x00000000;
563 ib->ptr[ib->length_dw++] = 0x00000008; /* len */
564 ib->ptr[ib->length_dw++] = 0x02000001; /* destroy cmd */
566 for (i = ib->length_dw; i < ib_size_dw; ++i)
567 ib->ptr[i] = 0x0;
590 * @ib: indirect buffer to use
599 struct amdgpu_ib *ib, int lo, int hi,
610 addr = ((uint64_t)amdgpu_ib_get_value(ib, lo)) |
611 ((uint64_t)amdgpu_ib_get_value(ib, hi)) << 32;
641 * @ib: indirect buffer to use
649 static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, struct amdgpu_ib *ib,
660 addr = ((uint64_t)amdgpu_ib_get_value(ib, lo)) |
661 ((uint64_t)amdgpu_ib_get_value(ib, hi)) << 32;
682 amdgpu_ib_set_value(ib, lo, lower_32_bits(addr));
683 amdgpu_ib_set_value(ib, hi, upper_32_bits(addr));
733 * @ib: the IB to patch
737 struct amdgpu_ib *ib)
751 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
753 for (idx = 0; idx < ib->length_dw;) {
754 uint32_t len = amdgpu_ib_get_value(ib, idx);
755 uint32_t cmd = amdgpu_ib_get_value(ib, idx + 1);
765 fb_idx = amdgpu_ib_get_value(ib, idx + 6);
766 bs_idx = amdgpu_ib_get_value(ib, idx + 7);
770 r = amdgpu_vce_validate_bo(p, ib, idx + 10, idx + 9,
775 r = amdgpu_vce_validate_bo(p, ib, idx + 12, idx + 11,
782 r = amdgpu_vce_validate_bo(p, ib, idx + 3, idx + 2,
789 tmp = amdgpu_ib_get_value(ib, idx + 4);
790 r = amdgpu_vce_validate_bo(p, ib, idx + 3, idx + 2,
797 r = amdgpu_vce_validate_bo(p, ib, idx + 3, idx + 2,
804 r = amdgpu_vce_validate_bo(p, ib, idx + 3, idx + 2,
809 r = amdgpu_vce_validate_bo(p, ib, idx + 8, idx + 7,
819 for (idx = 0; idx < ib->length_dw;) {
820 uint32_t len = amdgpu_ib_get_value(ib, idx);
821 uint32_t cmd = amdgpu_ib_get_value(ib, idx + 1);
825 handle = amdgpu_ib_get_value(ib, idx + 2);
836 fb_idx = amdgpu_ib_get_value(ib, idx + 6);
837 bs_idx = amdgpu_ib_get_value(ib, idx + 7);
852 *size = amdgpu_ib_get_value(ib, idx + 8) *
853 amdgpu_ib_get_value(ib, idx + 10) *
882 r = amdgpu_vce_cs_reloc(p, ib, idx + 10, idx + 9,
887 r = amdgpu_vce_cs_reloc(p, ib, idx + 12, idx + 11,
898 r = amdgpu_vce_cs_reloc(p, ib, idx + 3, idx + 2,
905 tmp = amdgpu_ib_get_value(ib, idx + 4);
906 r = amdgpu_vce_cs_reloc(p, ib, idx + 3, idx + 2,
913 r = amdgpu_vce_cs_reloc(p, ib, idx + 3, idx + 2,
920 r = amdgpu_vce_cs_reloc(p, ib, idx + 3,
925 r = amdgpu_vce_cs_reloc(p, ib, idx + 8,
972 * @ib: the IB to patch
976 struct amdgpu_ib *ib)
985 while (idx < ib->length_dw) {
986 uint32_t len = amdgpu_ib_get_value(ib, idx);
987 uint32_t cmd = amdgpu_ib_get_value(ib, idx + 1);
997 handle = amdgpu_ib_get_value(ib, idx + 2);
1046 amdgpu_ib_free(p->adev, ib, NULL);
1064 * @ib: the IB to execute
1070 struct amdgpu_ib *ib,
1074 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));
1075 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));
1076 amdgpu_ring_write(ring, ib->length_dw);
1151 /* skip vce ring1/2 ib test for now, since it's not reliable */