Lines Matching defs:ucode

624 		   struct amdgpu_firmware_info *ucode,
677 		if (ucode)
678 			DRM_WARN("failed to load ucode %s(0x%X) ",
679 				  amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id);
687 		if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) {
693 	if (ucode) {
694 		ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo;
695 		ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi;
1615 		dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n");
1764 		dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n");
1831 		dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n");
1899 		dev_info(psp->adev->dev, "RAP: optional rap ta ucode is not available\n");
1997 		dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");
2225 static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
2228 	switch (ucode->ucode_id) {
2418 			     struct amdgpu_firmware_info *ucode)
2423 	switch (ucode->ucode_id) {
2433 			adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data;
2465 static int psp_prep_load_ip_fw_cmd_buf(struct amdgpu_firmware_info *ucode,
2469 	uint64_t fw_mem_mc_addr = ucode->mc_addr;
2474 	cmd->cmd.cmd_load_ip_fw.fw_size = ucode->ucode_size;
2476 	ret = psp_get_fw_type(ucode, &cmd->cmd.cmd_load_ip_fw.fw_type);
2484 			   struct amdgpu_firmware_info *ucode)
2489 	ret = psp_prep_load_ip_fw_cmd_buf(ucode, cmd);
2491 		ret = psp_cmd_submit_buf(psp, ucode, cmd,
2504 	struct amdgpu_firmware_info *ucode =
2505 			&adev->firmware.ucode[AMDGPU_UCODE_ID_SMC];
2515 	if (!ucode->fw || amdgpu_sriov_vf(psp->adev))
2527 	ret = psp_execute_ip_fw_load(psp, ucode);
2536 			       struct amdgpu_firmware_info *ucode)
2538 	if (!ucode->fw || !ucode->ucode_size)
2541 	if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
2548 	    amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id))
2552 	    (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT ||
2553 	     ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT))
2564 	struct amdgpu_firmware_info *ucode;
2567 		ucode = ucode_list[i];
2568 		psp_print_fw_hdr(psp, ucode);
2569 		ret = psp_execute_ip_fw_load(psp, ucode);
2579 	struct amdgpu_firmware_info *ucode;
2590 		ucode = &adev->firmware.ucode[i];
2592 		if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
2593 		    !fw_load_skip_check(psp, ucode)) {
2600 		if (fw_load_skip_check(psp, ucode))
2607 		    (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 ||
2608 		     ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 ||
2609 		     ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3))
2615 		psp_print_fw_hdr(psp, ucode);
2617 		ret = psp_execute_ip_fw_load(psp, ucode);
2622 		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ?
3471 	info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP];