Lines Matching full:me
74 int me, int pipe, int queue)
78 bit += me * adev->gfx.me.num_pipe_per_me
79 * adev->gfx.me.num_queue_per_pipe;
80 bit += pipe * adev->gfx.me.num_queue_per_pipe;
87 int *me, int *pipe, int *queue)
89 *queue = bit % adev->gfx.me.num_queue_per_pipe;
90 *pipe = (bit / adev->gfx.me.num_queue_per_pipe)
91 % adev->gfx.me.num_pipe_per_me;
92 *me = (bit / adev->gfx.me.num_queue_per_pipe)
93 / adev->gfx.me.num_pipe_per_me;
97 int me, int pipe, int queue)
99 return test_bit(amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue),
100 adev->gfx.me.queue_bitmap);
152 return amdgpu_async_gfx_ring && adev->gfx.me.num_pipe_per_me > 1;
185 int me = ring->me;
188 bit = amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue);
249 int max_queues_per_me = adev->gfx.me.num_pipe_per_me *
250 adev->gfx.me.num_queue_per_pipe;
256 pipe = i % adev->gfx.me.num_pipe_per_me;
257 queue = (i / adev->gfx.me.num_pipe_per_me) %
258 adev->gfx.me.num_queue_per_pipe;
260 set_bit(pipe * adev->gfx.me.num_queue_per_pipe + queue,
261 adev->gfx.me.queue_bitmap);
265 set_bit(i, adev->gfx.me.queue_bitmap);
270 bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
297 ring->me = mec + 1;
333 snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d", xcc_id, ring->me, ring->pipe, ring->queue);
437 adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL);
438 if (!adev->gfx.me.mqd_backup[i]) {
481 kfree(adev->gfx.me.mqd_backup[i]);
606 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,