Lines Matching defs:kiq
312 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
315 mtx_init(&kiq->ring_lock, IPL_TTY);
323 (adev->doorbell_index.kiq +
331 ring->eop_gpu_addr = kiq->eop_gpu_addr;
337 dev_warn(adev->dev, "(%d) failed to init kiq ring\n", r);
349 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
351 amdgpu_bo_free_kernel(&kiq->eop_obj, &kiq->eop_gpu_addr, NULL);
359 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
362 AMDGPU_GEM_DOMAIN_GTT, &kiq->eop_obj,
363 &kiq->eop_gpu_addr, (void **)&hpd);
371 r = amdgpu_bo_reserve(kiq->eop_obj, true);
373 dev_warn(adev->dev, "(%d) reserve kiq eop bo failed\n", r);
374 amdgpu_bo_kunmap(kiq->eop_obj);
375 amdgpu_bo_unreserve(kiq->eop_obj);
385 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
386 struct amdgpu_ring *ring = &kiq->ring;
414 kiq->mqd_backup = kmalloc(mqd_size, GFP_KERNEL);
415 if (!kiq->mqd_backup) {
476 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
497 ring = &kiq->ring;
498 kfree(kiq->mqd_backup);
506 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
507 struct amdgpu_ring *kiq_ring = &kiq->ring;
511 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
514 spin_lock(&kiq->ring_lock);
515 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size *
517 spin_unlock(&kiq->ring_lock);
523 kiq->pmf->kiq_unmap_queues(kiq_ring,
530 spin_unlock(&kiq->ring_lock);
537 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
538 struct amdgpu_ring *kiq_ring = &kiq->ring;
542 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
545 spin_lock(&kiq->ring_lock);
547 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size *
549 spin_unlock(&kiq->ring_lock);
555 kiq->pmf->kiq_unmap_queues(kiq_ring,
561 if (adev->gfx.kiq[0].ring.sched.ready && !adev->job_hang)
563 spin_unlock(&kiq->ring_lock);
583 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
584 struct amdgpu_ring *kiq_ring = &kiq->ring;
588 if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources)
606 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
610 spin_lock(&kiq->ring_lock);
611 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
613 kiq->pmf->set_resources_size);
616 spin_unlock(&kiq->ring_lock);
623 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask);
626 kiq->pmf->kiq_map_queues(kiq_ring,
631 spin_unlock(&kiq->ring_lock);
640 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
641 struct amdgpu_ring *kiq_ring = &kiq->ring;
644 if (!kiq->pmf || !kiq->pmf->kiq_map_queues)
649 spin_lock(&kiq->ring_lock);
652 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
656 spin_unlock(&kiq->ring_lock);
662 kiq->pmf->kiq_map_queues(kiq_ring,
668 spin_unlock(&kiq->ring_lock);
931 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
932 struct amdgpu_ring *ring = &kiq->ring;
942 spin_lock_irqsave(&kiq->ring_lock, flags);
944 pr_err("critical bug! too many kiq readers\n");
957 spin_unlock_irqrestore(&kiq->ring_lock, flags);
989 spin_unlock_irqrestore(&kiq->ring_lock, flags);
1002 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
1003 struct amdgpu_ring *ring = &kiq->ring;
1015 spin_lock_irqsave(&kiq->ring_lock, flags);
1026 spin_unlock_irqrestore(&kiq->ring_lock, flags);
1056 spin_unlock_irqrestore(&kiq->ring_lock, flags);