Lines Matching defs:modifier
652 amdgpu_lookup_format_info(u32 format, uint64_t modifier)
654 if (!IS_AMD_FMT_MOD(modifier))
657 if (AMD_FMT_MOD_GET(DCC_RETILE, modifier))
662 if (AMD_FMT_MOD_GET(DCC, modifier))
724 uint64_t modifier = 0;
732 modifier = DRM_FORMAT_MOD_LINEAR;
824 modifier = AMD_FMT_MOD |
847 modifier |= AMD_FMT_MOD_SET(DCC, 1) |
861 * but we should convert it to a modifier plane for getfb2, so the
872 modifier |= AMD_FMT_MOD_SET(DCC_RETILE, 1);
884 modifier |= AMD_FMT_MOD_SET(RB, rb) |
894 modifier);
902 afb->base.modifier = modifier;
940 static unsigned int get_dcc_block_size(uint64_t modifier, bool rb_aligned,
943 unsigned int ver = AMD_FMT_MOD_GET(TILE_VERSION, modifier);
952 return max(10 + (rb_aligned ? (int)AMD_FMT_MOD_GET(RB, modifier) : 0), 12);
957 int pipes_log2 = AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifier);
960 AMD_FMT_MOD_GET(PACKERS, modifier) == pipes_log2)
1024 uint64_t modifier = rfb->base.modifier;
1032 if (modifier == DRM_FORMAT_MOD_LINEAR) {
1036 } else if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) >= AMD_FMT_MOD_TILE_VER_GFX12) {
1037 int swizzle = AMD_FMT_MOD_GET(TILE, modifier);
1061 int swizzle = AMD_FMT_MOD_GET(TILE, modifier);
1095 if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) <= AMD_FMT_MOD_TILE_VER_GFX11 &&
1096 AMD_FMT_MOD_GET(DCC, modifier)) {
1097 if (AMD_FMT_MOD_GET(DCC_RETILE, modifier)) {
1098 block_size_log2 = get_dcc_block_size(modifier, false, false);
1108 block_size_log2 = get_dcc_block_size(modifier, true, true);
1110 bool pipe_aligned = AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier);
1112 block_size_log2 = get_dcc_block_size(modifier, true, pipe_aligned);
1168 /* Verify that the modifier is supported. */
1170 mode_cmd->modifier[0])) {
1172 "unsupported pixel format %p4cc / modifier 0x%llx\n",
1173 &mode_cmd->pixel_format, mode_cmd->modifier[0]);
1208 * This needs to happen before modifier conversion as that might change
1226 "GFX9+ requires FB check based on format modifier\n");
1236 drm_dbg_kms(dev, "Failed to convert tiling flags 0x%llX to a modifier",