Lines Matching defs:gpio

40 					  ATOM_GPIO_I2C_ASSIGMENT *gpio,
46 static struct amdgpu_i2c_bus_rec amdgpu_atombios_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)
52 	i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex);
53 	i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex);
54 	i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex);
55 	i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex);
56 	i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex);
57 	i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex);
58 	i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex);
59 	i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex);
60 	i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
61 	i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
62 	i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
63 	i2c.en_data_mask = (1 << gpio->ucDataEnShift);
64 	i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
65 	i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
66 	i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
67 	i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
69 	if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
74 	if (gpio->sucI2cId.ucAccess == 0xa0)
79 	i2c.i2c_id = gpio->sucI2cId.ucAccess;
93 	ATOM_GPIO_I2C_ASSIGMENT *gpio;
109 		gpio = &i2c_info->asGPIO_Info[0];
112 			amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i);
114 			if (gpio->sucI2cId.ucAccess == id) {
115 				i2c = amdgpu_atombios_get_bus_rec_for_i2c_gpio(gpio);
118 			gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
119 				((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
129 	ATOM_GPIO_I2C_ASSIGMENT *gpio;
143 		gpio = &i2c_info->asGPIO_Info[0];
145 			amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i);
147 			i2c = amdgpu_atombios_get_bus_rec_for_i2c_gpio(gpio);
153 			gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
154 				((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
164 	struct amdgpu_gpio_rec gpio;
171 	memset(&gpio, 0, sizeof(struct amdgpu_gpio_rec));
172 	gpio.valid = false;
183 				gpio.id = pin->ucGPIO_ID;
184 				gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex);
185 				gpio.shift = pin->ucGpioPinBitShift;
186 				gpio.mask = (1 << pin->ucGpioPinBitShift);
187 				gpio.valid = true;
195 	return gpio;
200 				       struct amdgpu_gpio_rec *gpio)
209 	hpd.gpio = *gpio;
210 	if (gpio->reg == reg) {
211 		switch(gpio->mask) {
308 	struct amdgpu_gpio_rec gpio;
470 			/* look up gpio for ddc, hpd */
510 								gpio = amdgpu_atombios_lookup_gpio(adev,
512 								hpd = amdgpu_atombios_get_hpd_info_from_gpio(adev, &gpio);
1370 					ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =
1373 					if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)
1375 					lut = &gpio->asVolGpioLut[0];
1376 					for (i = 0; i < gpio->ucGpioEntryNum; i++) {
1384 					voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
1385 					voltage_table->count = gpio->ucGpioEntryNum;
1386 					voltage_table->phase_delay = gpio->ucPhaseDelay;