Lines Matching defs:chain
438 rtwn_rf_write(struct rtwn_softc *sc, int chain, uint16_t addr, uint32_t val)
452 rtwn_bb_write(sc, R92C_LSSI_PARAM(chain),
464 rtwn_rf_read(struct rtwn_softc *sc, int chain, uint8_t addr)
469 if (chain != 0)
470 reg[chain] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain));
476 rtwn_bb_write(sc, R92C_HSSI_PARAM2(chain),
477 RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) |
487 if (rtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI)
488 val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));
490 val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));
1922 /* Write RF initialization values for this chain. */
2084 rtwn_write_txpower(struct rtwn_softc *sc, int chain,
2090 if (chain == 0) {
2110 rtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain),
2115 rtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain),
2121 rtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain),
2126 rtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain),
2132 rtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain),
2137 rtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain),
2146 rtwn_get_txpower(struct rtwn_softc *sc, int chain, struct ieee80211_channel *c,
2150 rtwn_r88e_get_txpower(sc, chain, c, extc, power);
2152 rtwn_r92e_get_txpower(sc, chain, c, extc, power);
2154 rtwn_r92c_get_txpower(sc, chain, c, extc, power);
2158 rtwn_r92c_get_txpower(struct rtwn_softc *sc, int chain,
2177 /* Get original Tx power based on board type and RF chain. */
2180 base = &rtl8188ru_txagc[chain];
2182 base = &rtl8192cu_txagc[chain];
2184 base = &rtl8192cu_txagc[chain];
2199 max = (max >> (chain * 4)) & 0xf;
2210 cckpow = rom->cck_tx_pwr[chain][group];
2217 htpow = rom->ht40_1s_tx_pwr[chain][group];
2221 diff = (diff >> (chain * 4)) & 0xf;
2227 diff = (diff >> (chain * 4)) & 0xf;
2238 diff = (diff >> (chain * 4)) & 0xf;
2249 printf("Tx power for chain %d:\n", chain);
2257 rtwn_r92e_get_txpower(struct rtwn_softc *sc, int chain,
2274 if (chain == 0)
2320 rtwn_r88e_get_txpower(struct rtwn_softc *sc, int chain,
2568 rtwn_iq_calib_chain(struct rtwn_softc *sc, int chain, uint16_t tx[2],
2572 int offset = chain * 0x20;
2586 if (chain == 0) { /* IQ calibration for chain 0. */
2587 /* IQ calibration settings for chain 0. */
2594 /* IQ calibration settings for chain 1. */
2611 } else { /* IQ calibration for chain 1. */
2623 if (status & (1 << (28 + chain * 3)))
2633 if (status & (1 << (27 + chain * 3)))
2664 int i, chain;
2772 for (chain = 0; chain < sc->ntxchains; chain++) {
2773 if (chain > 0) {
2774 /* Put chain 0 on standby. */
2779 /* Enable chain 1. */
2788 ret = rtwn_iq_calib_chain(sc, chain,
2789 tx[chain], rx[chain]);
2791 DPRINTF(("%s: chain %d: Tx failed.\n",
2792 __func__, chain));
2793 tx[chain][0] = 0xff;
2794 tx[chain][1] = 0xff;
2795 rx[chain][0] = 0xff;
2796 rx[chain][1] = 0xff;
2798 DPRINTF(("%s: chain %d: Rx failed.\n",
2799 __func__, chain));
2800 rx[chain][0] = 0xff;
2801 rx[chain][1] = 0xff;
2803 DPRINTF(("%s: chain %d: Both Tx and Rx "
2804 "succeeded.\n", __func__, chain));
2808 DPRINTF(("%s: results for run %d chain %d: tx[0]=0x%x, "
2809 "tx[1]=0x%x rx[0]=0x%x rx[1]=0x%x\n", __func__, n, chain,
2810 tx[chain][0], tx[chain][1], rx[chain][0], rx[chain][1]));
2878 int chain, i, tx_ok[2], rx_ok[2];
2881 for (chain = 0; chain < ntxchains; chain++) {
2883 if (tx1[chain][i] == 0xff || tx2[chain][i] == 0xff ||
2884 rx1[chain][i] == 0xff || rx2[chain][i] == 0xff)
2887 tx_ok[chain] = (abs(tx1[chain][i] - tx2[chain][i]) <=
2890 rx_ok[chain] = (abs(rx1[chain][i] - rx2[chain][i]) <=
2904 uint16_t rx[2], int chain)
2912 reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
2919 rtwn_bb_write(sc, R92C_OFDM0_TXIQIMBALANCE(chain), reg);
2932 reg = rtwn_bb_read(sc, R92C_OFDM0_TXAFE(chain));
2935 rtwn_bb_write(sc, R92C_OFDM0_TXAFE(chain), reg);
2937 reg = rtwn_bb_read(sc, R92C_OFDM0_TXIQIMBALANCE(chain));
2940 rtwn_bb_write(sc, R92C_OFDM0_TXIQIMBALANCE(chain), reg);
2952 reg = rtwn_bb_read(sc, R92C_OFDM0_RXIQIMBALANCE(chain));
2955 rtwn_bb_write(sc, R92C_OFDM0_RXIQIMBALANCE(chain), reg);
2959 rtwn_bb_write(sc, R92C_OFDM0_RXIQIMBALANCE(chain), reg);
2961 if (chain == 0) {