Lines Matching defs:my

1729 	} *my = page;
1752 		my->sc = (struct nvme_softc *)disk->dv_parent->dv_parent;
1755 		my->nsid = 0;
1759 				my->nsid = link->target;
1763 		if (my->nsid == 0)
1765 		ns = my->sc->sc_namespaces[my->nsid].ident;
1768 		my->poffset = blkno;
1769 		my->psize = size;
1770 		my->secsize = 1 << f->lbads;
1772 		memset(NVME_DMA_KVA(my->sc->sc_hib_q->q_cq_dmamem), 0,
1773 		    my->sc->sc_hib_q->q_entries * sizeof(struct nvme_cqe));
1774 		memset(NVME_DMA_KVA(my->sc->sc_hib_q->q_sq_dmamem), 0,
1775 		    my->sc->sc_hib_q->q_entries * sizeof(struct nvme_sqe));
1777 		my->sq_tail = 0;
1778 		my->cq_head = 0;
1779 		my->cqe_phase = NVME_CQE_PHASE;
1784 		    NVME_DMA_DVA(my->sc->sc_hib_q->q_cq_dmamem));
1785 		htolem16(&qsqe.qsize, my->sc->sc_hib_q->q_entries - 1);
1786 		htolem16(&qsqe.qid, my->sc->sc_hib_q->q_id);
1788 		if (nvme_hibernate_admin_cmd(my->sc, (struct nvme_sqe *)&qsqe,
1795 		    NVME_DMA_DVA(my->sc->sc_hib_q->q_sq_dmamem));
1796 		htolem16(&qsqe.qsize, my->sc->sc_hib_q->q_entries - 1);
1797 		htolem16(&qsqe.qid, my->sc->sc_hib_q->q_id);
1798 		htolem16(&qsqe.cqid, my->sc->sc_hib_q->q_id);
1800 		if (nvme_hibernate_admin_cmd(my->sc, (struct nvme_sqe *)&qsqe,
1810 	if (blkno + (size / DEV_BSIZE) > my->psize)
1813 	isqe = NVME_DMA_KVA(my->sc->sc_hib_q->q_sq_dmamem);
1814 	isqe += my->sq_tail;
1815 	if (++my->sq_tail == my->sc->sc_hib_q->q_entries)
1816 		my->sq_tail = 0;
1820 	htolem32(&isqe->nsid, my->nsid);
1825 	if ((size > my->sc->sc_mps) && (size <= my->sc->sc_mps * 2)) {
1826 		htolem64(&isqe->entry.prp[1], data_bus_phys + my->sc->sc_mps);
1827 	} else if (size > my->sc->sc_mps * 2) {
1832 		for (i = 1; i < howmany(size, my->sc->sc_mps); i++) {
1833 			htolem64(&my->prpl[i - 1], data_bus_phys +
1834 			    (i * my->sc->sc_mps));
1838 	isqe->slba = (blkno + my->poffset) / (my->secsize / DEV_BSIZE);
1839 	isqe->nlb = (size / my->secsize) - 1;
1842 	nvme_write4(my->sc, NVME_SQTDBL(NVME_HIB_Q, my->sc->sc_dstrd),
1843 	    my->sq_tail);
1844 	nvme_barrier(my->sc, NVME_SQTDBL(NVME_HIB_Q, my->sc->sc_dstrd), 4,
1849 	icqe = NVME_DMA_KVA(my->sc->sc_hib_q->q_cq_dmamem);
1850 	icqe += my->cq_head;
1852 	nvme_dmamem_sync(my->sc, my->sc->sc_hib_q->q_cq_dmamem,
1856 		if ((flags & NVME_CQE_PHASE) == my->cqe_phase) {
1865 		nvme_dmamem_sync(my->sc, my->sc->sc_hib_q->q_cq_dmamem,
1868 	nvme_dmamem_sync(my->sc, my->sc->sc_hib_q->q_cq_dmamem,
1871 	if (++my->cq_head == my->sc->sc_hib_q->q_entries) {
1872 		my->cq_head = 0;
1873 		my->cqe_phase ^= NVME_CQE_PHASE;
1876 	nvme_write4(my->sc, NVME_CQHDBL(NVME_HIB_Q, my->sc->sc_dstrd),
1877 	    my->cq_head);
1878 	nvme_barrier(my->sc, NVME_CQHDBL(NVME_HIB_Q, my->sc->sc_dstrd), 4,