Lines Matching defs:cbp
1144 struct fxp_cb_config *cbp;
1198 cbp = &sc->sc_ctrl->u.cfg;
1204 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status,
1211 cbp->cb_status = 0;
1212 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1213 cbp->link_addr = 0xffffffff; /* (no) next command */
1214 cbp->byte_count = 22; /* (22) bytes to config */
1215 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
1216 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
1217 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
1218 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
1219 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
1220 cbp->dma_bce = 0; /* (disable) dma max counters */
1221 cbp->late_scb = 0; /* (don't) defer SCB update */
1222 cbp->tno_int = 0; /* (disable) tx not okay interrupt */
1223 cbp->ci_int = 1; /* interrupt on CU idle */
1224 cbp->save_bf = save_bf ? 1 : prm; /* save bad frames */
1225 cbp->disc_short_rx = !prm; /* discard short packets */
1226 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
1227 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
1228 cbp->nsai = 1; /* (don't) disable source addr insert */
1229 cbp->preamble_length = 2; /* (7 byte) preamble */
1230 cbp->loopback = 0; /* (don't) loopback */
1231 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
1232 cbp->linear_pri_mode = 0; /* (wait after xmit only) */
1233 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
1234 cbp->promiscuous = prm; /* promiscuous mode */
1235 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
1236 cbp->crscdt = 0; /* (CRS only) */
1237 cbp->stripping = !prm; /* truncate rx packet to byte count */
1238 cbp->padding = 1; /* (do) pad short tx packets */
1239 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
1240 cbp->long_rx = lrxen; /* (enable) long packets */
1241 cbp->force_fdx = 0; /* (don't) force full duplex */
1242 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
1243 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
1244 cbp->mc_all = allm;
1246 cbp->cb_command = htole16(FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL);
1249 cbp->mc_all |= 0x08; /* accept all multicasts */
1251 cbp->mc_all &= ~0x08; /* reject all multicasts */
1254 cbp->promiscuous |= 1; /* promiscuous mode */
1255 cbp->ctrl2 &= ~0x01; /* save short packets */
1256 cbp->stripping &= ~0x01; /* don't truncate rx packets */
1258 cbp->promiscuous &= ~1; /* no promiscuous mode */
1259 cbp->ctrl2 |= 0x01; /* discard short packets */
1260 cbp->stripping |= 0x01; /* truncate rx packets */
1264 cbp->ctrl1 |= 0x80; /* save bad frames */
1266 cbp->ctrl1 &= ~0x80; /* discard bad frames */
1269 cbp->ctrl0 |= 0x01; /* enable PCI MWI command */
1272 cbp->mediatype |= 0x01;
1274 cbp->mediatype &= ~0x01;
1277 cbp->stripping |= 0x08;
1279 cbp->stripping &= ~0x08;
1281 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max, dma_dce = 0 ??? */
1282 cbp->ctrl1 |= 0x08; /* ci_int = 1 */
1283 cbp->ctrl3 |= 0x08; /* nsai */
1284 cbp->fifo_limit = 0x08; /* tx and rx fifo limit */
1285 cbp->fdx_pin |= 0x80; /* Enable full duplex setting by pin */
1301 } while ((cbp->cb_status & htole16(FXP_CB_STATUS_C)) == 0 && i--);
1304 if (!(cbp->cb_status & htole16(FXP_CB_STATUS_C))) {
1801 struct fxp_cb_ucode *cbp = &sc->sc_ctrl->u.code;
1844 cbp->cb_status = 0;
1845 cbp->cb_command = htole16(FXP_CB_COMMAND_UCODE|FXP_CB_COMMAND_EL);
1846 cbp->link_addr = 0xffffffff; /* (no) next command */
1848 cbp->ucode[i] = sc->sc_ucodebuf[i];
1851 *((u_int16_t *)&cbp->ucode[uc->int_delay_offset]) =
1855 *((u_int16_t *)&cbp->ucode[uc->bundle_max_offset]) =
1859 *((u_int16_t *)&cbp->ucode[uc->min_size_mask_offset]) =
1877 } while (((cbp->cb_status & htole16(FXP_CB_STATUS_C)) == 0) && --i);