Lines Matching defs:offset
367 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
369 *nbshp = bsh + offset;
401 bus_size_t offset);
403 bus_size_t offset);
405 bus_size_t offset);
407 bus_size_t offset);
409 bus_size_t offset);
411 bus_size_t offset);
414 __shpcic_io_read_1(bus_space_handle_t bsh, bus_size_t offset)
416 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
422 __shpcic_io_read_2(bus_space_handle_t bsh, bus_size_t offset)
424 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
430 __shpcic_io_read_4(bus_space_handle_t bsh, bus_size_t offset)
432 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
438 __shpcic_mem_read_1(bus_space_handle_t bsh, bus_size_t offset)
440 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
446 __shpcic_mem_read_2(bus_space_handle_t bsh, bus_size_t offset)
448 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
454 __shpcic_mem_read_4(bus_space_handle_t bsh, bus_size_t offset)
456 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
465 shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
469 value = __shpcic_io_read_1(bsh, offset);
475 shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
479 value = __shpcic_io_read_2(bsh, offset);
485 shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
489 value = __shpcic_io_read_4(bsh, offset);
495 shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
499 value = __shpcic_mem_read_1(bsh, offset);
505 shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
509 value = __shpcic_mem_read_2(bsh, offset);
515 shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
519 value = __shpcic_mem_read_4(bsh, offset);
529 bus_size_t offset, uint8_t *addr, bus_size_t count)
532 *addr++ = __shpcic_io_read_1(bsh, offset);
538 bus_size_t offset, uint16_t *addr, bus_size_t count)
541 *addr++ = __shpcic_io_read_2(bsh, offset);
547 bus_size_t offset, uint32_t *addr, bus_size_t count)
550 *addr++ = __shpcic_io_read_4(bsh, offset);
556 bus_size_t offset, uint8_t *addr, bus_size_t count)
559 *addr++ = __shpcic_mem_read_1(bsh, offset);
565 bus_size_t offset, uint16_t *addr, bus_size_t count)
568 *addr++ = __shpcic_mem_read_2(bsh, offset);
574 bus_size_t offset, uint32_t *addr, bus_size_t count)
577 *addr++ = __shpcic_mem_read_4(bsh, offset);
587 bus_size_t offset, uint8_t *addr, bus_size_t count)
591 *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
598 bus_size_t offset, uint8_t *addr, bus_size_t count)
602 *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
609 bus_size_t offset, uint8_t *addr, bus_size_t count)
613 *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
620 bus_size_t offset, uint8_t *addr, bus_size_t count)
624 *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
634 bus_size_t offset, uint8_t *addr, bus_size_t count)
637 *addr++ = __shpcic_io_read_1(bsh, offset);
638 offset += 1;
644 bus_size_t offset, uint16_t *addr, bus_size_t count)
647 *addr++ = __shpcic_io_read_2(bsh, offset);
648 offset += 2;
654 bus_size_t offset, uint32_t *addr, bus_size_t count)
657 *addr++ = __shpcic_io_read_4(bsh, offset);
658 offset += 4;
664 bus_size_t offset, uint8_t *addr, bus_size_t count)
667 *addr++ = __shpcic_mem_read_1(bsh, offset);
668 offset += 1;
674 bus_size_t offset, uint16_t *addr, bus_size_t count)
677 *addr++ = __shpcic_mem_read_2(bsh, offset);
678 offset += 2;
684 bus_size_t offset, uint32_t *addr, bus_size_t count)
687 *addr++ = __shpcic_mem_read_4(bsh, offset);
688 offset += 4;
698 bus_size_t offset, uint8_t *addr, bus_size_t count)
702 *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
704 offset += 2;
710 bus_size_t offset, uint8_t *addr, bus_size_t count)
714 *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
716 offset += 4;
722 bus_size_t offset, uint8_t *addr, bus_size_t count)
726 *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
728 offset += 2;
734 bus_size_t offset, uint8_t *addr, bus_size_t count)
738 *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
740 offset += 4;
746 bus_size_t offset, uint8_t value);
748 bus_size_t offset, uint16_t value);
750 bus_size_t offset, uint32_t value);
752 bus_size_t offset, uint8_t value);
754 bus_size_t offset, uint16_t value);
756 bus_size_t offset, uint32_t value);
759 __shpcic_io_write_1(bus_space_handle_t bsh, bus_size_t offset,
762 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
768 __shpcic_io_write_2(bus_space_handle_t bsh, bus_size_t offset,
771 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
777 __shpcic_io_write_4(bus_space_handle_t bsh, bus_size_t offset,
780 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
786 __shpcic_mem_write_1(bus_space_handle_t bsh, bus_size_t offset,
789 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
795 __shpcic_mem_write_2(bus_space_handle_t bsh, bus_size_t offset,
798 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
804 __shpcic_mem_write_4(bus_space_handle_t bsh, bus_size_t offset,
807 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
817 bus_size_t offset, uint8_t value)
819 __shpcic_io_write_1(bsh, offset, value);
824 bus_size_t offset, uint16_t value)
826 __shpcic_io_write_2(bsh, offset, value);
831 bus_size_t offset, uint32_t value)
833 __shpcic_io_write_4(bsh, offset, value);
838 bus_size_t offset, uint8_t value)
840 __shpcic_mem_write_1(bsh, offset, value);
845 bus_size_t offset, uint16_t value)
847 __shpcic_mem_write_2(bsh, offset, value);
852 bus_size_t offset, uint32_t value)
854 __shpcic_mem_write_4(bsh, offset, value);
862 bus_size_t offset, const uint8_t *addr, bus_size_t count)
865 __shpcic_io_write_1(bsh, offset, *addr++);
871 bus_size_t offset, const uint16_t *addr, bus_size_t count)
874 __shpcic_io_write_2(bsh, offset, *addr++);
880 bus_size_t offset, const uint32_t *addr, bus_size_t count)
883 __shpcic_io_write_4(bsh, offset, *addr++);
889 bus_size_t offset, const uint8_t *addr, bus_size_t count)
892 __shpcic_mem_write_1(bsh, offset, *addr++);
898 bus_size_t offset, const uint16_t *addr, bus_size_t count)
901 __shpcic_mem_write_2(bsh, offset, *addr++);
907 bus_size_t offset, const uint32_t *addr, bus_size_t count)
910 __shpcic_mem_write_4(bsh, offset, *addr++);
920 bus_size_t offset, const uint8_t *addr, bus_size_t count)
924 __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
931 bus_size_t offset, const uint8_t *addr, bus_size_t count)
935 __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
942 bus_size_t offset, const uint8_t *addr, bus_size_t count)
946 __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
953 bus_size_t offset, const uint8_t *addr, bus_size_t count)
957 __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
967 bus_size_t offset, const uint8_t *addr, bus_size_t count)
970 __shpcic_io_write_1(bsh, offset, *addr++);
971 offset += 1;
977 bus_size_t offset, const uint16_t *addr, bus_size_t count)
980 __shpcic_io_write_2(bsh, offset, *addr++);
981 offset += 2;
987 bus_size_t offset, const uint32_t *addr, bus_size_t count)
990 __shpcic_io_write_4(bsh, offset, *addr++);
991 offset += 4;
997 bus_size_t offset, const uint8_t *addr, bus_size_t count)
1000 __shpcic_mem_write_1(bsh, offset, *addr++);
1001 offset += 1;
1007 bus_size_t offset, const uint16_t *addr, bus_size_t count)
1010 __shpcic_mem_write_2(bsh, offset, *addr++);
1011 offset += 2;
1017 bus_size_t offset, const uint32_t *addr, bus_size_t count)
1020 __shpcic_mem_write_4(bsh, offset, *addr++);
1021 offset += 4;
1031 bus_size_t offset, const uint8_t *addr, bus_size_t count)
1035 __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
1037 offset += 2;
1043 bus_size_t offset, const uint8_t *addr, bus_size_t count)
1047 __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
1049 offset += 4;
1055 bus_size_t offset, const uint8_t *addr, bus_size_t count)
1059 __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
1061 offset += 2;
1067 bus_size_t offset, const uint8_t *addr, bus_size_t count)
1071 __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
1073 offset += 4;
1082 bus_size_t offset, uint8_t value, bus_size_t count)
1085 __shpcic_io_write_1(bsh, offset, value);
1091 bus_size_t offset, uint16_t value, bus_size_t count)
1094 __shpcic_io_write_2(bsh, offset, value);
1100 bus_size_t offset, uint32_t value, bus_size_t count)
1103 __shpcic_io_write_4(bsh, offset, value);
1109 bus_size_t offset, uint8_t value, bus_size_t count)
1112 __shpcic_mem_write_1(bsh, offset, value);
1118 bus_size_t offset, uint16_t value, bus_size_t count)
1121 __shpcic_mem_write_2(bsh, offset, value);
1127 bus_size_t offset, uint32_t value, bus_size_t count)
1130 __shpcic_mem_write_4(bsh, offset, value);
1139 bus_size_t offset, uint8_t value, bus_size_t count)
1142 __shpcic_io_write_1(bsh, offset, value);
1143 offset += 1;
1149 bus_size_t offset, uint16_t value, bus_size_t count)
1152 __shpcic_io_write_2(bsh, offset, value);
1153 offset += 2;
1159 bus_size_t offset, uint32_t value, bus_size_t count)
1162 __shpcic_io_write_4(bsh, offset, value);
1163 offset += 4;
1169 bus_size_t offset, uint8_t value, bus_size_t count)
1172 __shpcic_mem_write_1(bsh, offset, value);
1173 offset += 1;
1179 bus_size_t offset, uint16_t value, bus_size_t count)
1182 __shpcic_mem_write_2(bsh, offset, value);
1183 offset += 2;
1189 bus_size_t offset, uint32_t value, bus_size_t count)
1192 __shpcic_mem_write_4(bsh, offset, value);
1193 offset += 4;