Lines Matching defs:bsh
360 shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
366 shpcic_iomem_subregion(void *v, bus_space_handle_t bsh,
369 *nbshp = bsh + offset;
385 shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
391 shpcic_iomem_vaddr(void *v, bus_space_handle_t bsh)
393 return ((void *)bsh);
400 static inline uint8_t __shpcic_io_read_1(bus_space_handle_t bsh,
402 static inline uint16_t __shpcic_io_read_2(bus_space_handle_t bsh,
404 static inline uint32_t __shpcic_io_read_4(bus_space_handle_t bsh,
406 static inline uint8_t __shpcic_mem_read_1(bus_space_handle_t bsh,
408 static inline uint16_t __shpcic_mem_read_2(bus_space_handle_t bsh,
410 static inline uint32_t __shpcic_mem_read_4(bus_space_handle_t bsh,
414 __shpcic_io_read_1(bus_space_handle_t bsh, bus_size_t offset)
416 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
422 __shpcic_io_read_2(bus_space_handle_t bsh, bus_size_t offset)
424 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
430 __shpcic_io_read_4(bus_space_handle_t bsh, bus_size_t offset)
432 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
438 __shpcic_mem_read_1(bus_space_handle_t bsh, bus_size_t offset)
440 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
446 __shpcic_mem_read_2(bus_space_handle_t bsh, bus_size_t offset)
448 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
454 __shpcic_mem_read_4(bus_space_handle_t bsh, bus_size_t offset)
456 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
465 shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
469 value = __shpcic_io_read_1(bsh, offset);
475 shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
479 value = __shpcic_io_read_2(bsh, offset);
485 shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
489 value = __shpcic_io_read_4(bsh, offset);
495 shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset)
499 value = __shpcic_mem_read_1(bsh, offset);
505 shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset)
509 value = __shpcic_mem_read_2(bsh, offset);
515 shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset)
519 value = __shpcic_mem_read_4(bsh, offset);
528 shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh,
532 *addr++ = __shpcic_io_read_1(bsh, offset);
537 shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh,
541 *addr++ = __shpcic_io_read_2(bsh, offset);
546 shpcic_io_read_multi_4(void *v, bus_space_handle_t bsh,
550 *addr++ = __shpcic_io_read_4(bsh, offset);
555 shpcic_mem_read_multi_1(void *v, bus_space_handle_t bsh,
559 *addr++ = __shpcic_mem_read_1(bsh, offset);
564 shpcic_mem_read_multi_2(void *v, bus_space_handle_t bsh,
568 *addr++ = __shpcic_mem_read_2(bsh, offset);
573 shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh,
577 *addr++ = __shpcic_mem_read_4(bsh, offset);
586 shpcic_io_read_raw_multi_2(void *v, bus_space_handle_t bsh,
591 *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
597 shpcic_io_read_raw_multi_4(void *v, bus_space_handle_t bsh,
602 *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
608 shpcic_mem_read_raw_multi_2(void *v, bus_space_handle_t bsh,
613 *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
619 shpcic_mem_read_raw_multi_4(void *v, bus_space_handle_t bsh,
624 *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
633 shpcic_io_read_region_1(void *v, bus_space_handle_t bsh,
637 *addr++ = __shpcic_io_read_1(bsh, offset);
643 shpcic_io_read_region_2(void *v, bus_space_handle_t bsh,
647 *addr++ = __shpcic_io_read_2(bsh, offset);
653 shpcic_io_read_region_4(void *v, bus_space_handle_t bsh,
657 *addr++ = __shpcic_io_read_4(bsh, offset);
663 shpcic_mem_read_region_1(void *v, bus_space_handle_t bsh,
667 *addr++ = __shpcic_mem_read_1(bsh, offset);
673 shpcic_mem_read_region_2(void *v, bus_space_handle_t bsh,
677 *addr++ = __shpcic_mem_read_2(bsh, offset);
683 shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh,
687 *addr++ = __shpcic_mem_read_4(bsh, offset);
697 shpcic_io_read_raw_region_2(void *v, bus_space_handle_t bsh,
702 *(uint16_t *)addr = __shpcic_io_read_2(bsh, offset);
709 shpcic_io_read_raw_region_4(void *v, bus_space_handle_t bsh,
714 *(uint32_t *)addr = __shpcic_io_read_4(bsh, offset);
721 shpcic_mem_read_raw_region_2(void *v, bus_space_handle_t bsh,
726 *(uint16_t *)addr = __shpcic_mem_read_2(bsh, offset);
733 shpcic_mem_read_raw_region_4(void *v, bus_space_handle_t bsh,
738 *(uint32_t *)addr = __shpcic_mem_read_4(bsh, offset);
745 static inline void __shpcic_io_write_1(bus_space_handle_t bsh,
747 static inline void __shpcic_io_write_2(bus_space_handle_t bsh,
749 static inline void __shpcic_io_write_4(bus_space_handle_t bsh,
751 static inline void __shpcic_mem_write_1(bus_space_handle_t bsh,
753 static inline void __shpcic_mem_write_2(bus_space_handle_t bsh,
755 static inline void __shpcic_mem_write_4(bus_space_handle_t bsh,
759 __shpcic_io_write_1(bus_space_handle_t bsh, bus_size_t offset,
762 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
768 __shpcic_io_write_2(bus_space_handle_t bsh, bus_size_t offset,
771 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
777 __shpcic_io_write_4(bus_space_handle_t bsh, bus_size_t offset,
780 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_IO_MASK;
786 __shpcic_mem_write_1(bus_space_handle_t bsh, bus_size_t offset,
789 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
795 __shpcic_mem_write_2(bus_space_handle_t bsh, bus_size_t offset,
798 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
804 __shpcic_mem_write_4(bus_space_handle_t bsh, bus_size_t offset,
807 u_long adr = (u_long)(bsh + offset) & SH4_PCIC_MEM_MASK;
816 shpcic_io_write_1(void *v, bus_space_handle_t bsh,
819 __shpcic_io_write_1(bsh, offset, value);
823 shpcic_io_write_2(void *v, bus_space_handle_t bsh,
826 __shpcic_io_write_2(bsh, offset, value);
830 shpcic_io_write_4(void *v, bus_space_handle_t bsh,
833 __shpcic_io_write_4(bsh, offset, value);
837 shpcic_mem_write_1(void *v, bus_space_handle_t bsh,
840 __shpcic_mem_write_1(bsh, offset, value);
844 shpcic_mem_write_2(void *v, bus_space_handle_t bsh,
847 __shpcic_mem_write_2(bsh, offset, value);
851 shpcic_mem_write_4(void *v, bus_space_handle_t bsh,
854 __shpcic_mem_write_4(bsh, offset, value);
861 shpcic_io_write_multi_1(void *v, bus_space_handle_t bsh,
865 __shpcic_io_write_1(bsh, offset, *addr++);
870 shpcic_io_write_multi_2(void *v, bus_space_handle_t bsh,
874 __shpcic_io_write_2(bsh, offset, *addr++);
879 shpcic_io_write_multi_4(void *v, bus_space_handle_t bsh,
883 __shpcic_io_write_4(bsh, offset, *addr++);
888 shpcic_mem_write_multi_1(void *v, bus_space_handle_t bsh,
892 __shpcic_mem_write_1(bsh, offset, *addr++);
897 shpcic_mem_write_multi_2(void *v, bus_space_handle_t bsh,
901 __shpcic_mem_write_2(bsh, offset, *addr++);
906 shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh,
910 __shpcic_mem_write_4(bsh, offset, *addr++);
919 shpcic_io_write_raw_multi_2(void *v, bus_space_handle_t bsh,
924 __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
930 shpcic_io_write_raw_multi_4(void *v, bus_space_handle_t bsh,
935 __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
941 shpcic_mem_write_raw_multi_2(void *v, bus_space_handle_t bsh,
946 __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
952 shpcic_mem_write_raw_multi_4(void *v, bus_space_handle_t bsh,
957 __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
966 shpcic_io_write_region_1(void *v, bus_space_handle_t bsh,
970 __shpcic_io_write_1(bsh, offset, *addr++);
976 shpcic_io_write_region_2(void *v, bus_space_handle_t bsh,
980 __shpcic_io_write_2(bsh, offset, *addr++);
986 shpcic_io_write_region_4(void *v, bus_space_handle_t bsh,
990 __shpcic_io_write_4(bsh, offset, *addr++);
996 shpcic_mem_write_region_1(void *v, bus_space_handle_t bsh,
1000 __shpcic_mem_write_1(bsh, offset, *addr++);
1006 shpcic_mem_write_region_2(void *v, bus_space_handle_t bsh,
1010 __shpcic_mem_write_2(bsh, offset, *addr++);
1016 shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh,
1020 __shpcic_mem_write_4(bsh, offset, *addr++);
1030 shpcic_io_write_raw_region_2(void *v, bus_space_handle_t bsh,
1035 __shpcic_io_write_2(bsh, offset, *(uint16_t *)addr);
1042 shpcic_io_write_raw_region_4(void *v, bus_space_handle_t bsh,
1047 __shpcic_io_write_4(bsh, offset, *(uint32_t *)addr);
1054 shpcic_mem_write_raw_region_2(void *v, bus_space_handle_t bsh,
1059 __shpcic_mem_write_2(bsh, offset, *(uint16_t *)addr);
1066 shpcic_mem_write_raw_region_4(void *v, bus_space_handle_t bsh,
1071 __shpcic_mem_write_4(bsh, offset, *(uint32_t *)addr);
1081 shpcic_io_set_multi_1(void *v, bus_space_handle_t bsh,
1085 __shpcic_io_write_1(bsh, offset, value);
1090 shpcic_io_set_multi_2(void *v, bus_space_handle_t bsh,
1094 __shpcic_io_write_2(bsh, offset, value);
1099 shpcic_io_set_multi_4(void *v, bus_space_handle_t bsh,
1103 __shpcic_io_write_4(bsh, offset, value);
1108 shpcic_mem_set_multi_1(void *v, bus_space_handle_t bsh,
1112 __shpcic_mem_write_1(bsh, offset, value);
1117 shpcic_mem_set_multi_2(void *v, bus_space_handle_t bsh,
1121 __shpcic_mem_write_2(bsh, offset, value);
1126 shpcic_mem_set_multi_4(void *v, bus_space_handle_t bsh,
1130 __shpcic_mem_write_4(bsh, offset, value);
1138 shpcic_io_set_region_1(void *v, bus_space_handle_t bsh,
1142 __shpcic_io_write_1(bsh, offset, value);
1148 shpcic_io_set_region_2(void *v, bus_space_handle_t bsh,
1152 __shpcic_io_write_2(bsh, offset, value);
1158 shpcic_io_set_region_4(void *v, bus_space_handle_t bsh,
1162 __shpcic_io_write_4(bsh, offset, value);
1168 shpcic_mem_set_region_1(void *v, bus_space_handle_t bsh,
1172 __shpcic_mem_write_1(bsh, offset, value);
1178 shpcic_mem_set_region_2(void *v, bus_space_handle_t bsh,
1182 __shpcic_mem_write_2(bsh, offset, value);
1188 shpcic_mem_set_region_4(void *v, bus_space_handle_t bsh,
1192 __shpcic_mem_write_4(bsh, offset, value);