Lines Matching full:inc
7 HDRS= PPCGenAsmMatcher.inc \
8 PPCGenAsmWriter.inc \
9 PPCGenCallingConv.inc \
10 PPCGenDAGISel.inc \
11 PPCGenDisassemblerTables.inc \
12 PPCGenFastISel.inc \
13 PPCGenInstrInfo.inc \
14 PPCGenMCCodeEmitter.inc \
15 PPCGenRegisterInfo.inc \
16 PPCGenSubtargetInfo.inc \
17 PPCGenExegesis.inc \
18 PPCGenRegisterBank.inc \
19 PPCGenGlobalISel.inc
29 PPCGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
34 PPCGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
39 PPCGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
44 PPCGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
49 PPCGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
54 PPCGenFastISel.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
59 PPCGenInstrInfo.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
64 PPCGenMCCodeEmitter.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
69 PPCGenRegisterInfo.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
74 PPCGenSubtargetInfo.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
79 PPCGenExegesis.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
84 PPCGenRegisterBank.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
89 PPCGenGlobalISel.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td