Lines Matching refs:constraint
4259 #define constraint(expr, err) do { \ macro
4651 constraint (Rn == inst.operands[0].reg || Rn == inst.operands[1].reg, in do_rd_rm_rn()
4739 constraint ((inst.instruction & 0xf0) != 0x40 in do_barrier()
4753 constraint (msb > 32, _("bit-field extends past end of register")); in do_bfc()
4772 constraint (msb > 32, _("bit-field extends past end of register")); in do_bfi()
4784 constraint (inst.operands[2].imm + inst.operands[3].imm > 32, in do_bfx()
4813 constraint (inst.operands[0].imm != BFD_RELOC_ARM_PLT32, in encode_branch()
4875 constraint (inst.cond != COND_ALWAYS, BAD_COND); in do_blx()
5039 constraint (inst.operands[0].reg % 2 != 0, in do_ldrd()
5041 constraint (inst.operands[1].present in do_ldrd()
5044 constraint (inst.operands[0].reg == REG_LR, _("r14 not allowed here")); in do_ldrd()
5045 constraint (!inst.operands[2].isreg, _("'[' expected")); in do_ldrd()
5076 constraint (!inst.operands[1].isreg || !inst.operands[1].preind in do_ldrex()
5094 constraint (inst.reloc.exp.X_op != O_constant in do_ldrex()
5106 constraint (inst.operands[0].reg % 2 != 0, in do_ldrexd()
5108 constraint (inst.operands[1].present in do_ldrexd()
5113 constraint (inst.operands[0].reg == REG_LR, _("r14 not allowed here")); in do_ldrexd()
5136 constraint (inst.reloc.exp.X_op != O_constant || in do_ldstt()
5167 constraint (inst.reloc.exp.X_op != O_constant || in do_ldsttv4()
5220 constraint (top && inst.reloc.type == BFD_RELOC_ARM_MOVW, in do_mov16()
5222 constraint (!top && inst.reloc.type == BFD_RELOC_ARM_MOVT, in do_mov16()
5238 constraint ((inst.operands[1].imm & (PSR_c|PSR_x|PSR_s|PSR_f)) in do_mrs()
5355 constraint (!inst.operands[0].isreg, in do_pld()
5357 constraint (inst.operands[0].postind, in do_pld()
5359 constraint (inst.operands[0].writeback, in do_pld()
5361 constraint (!inst.operands[0].preind, in do_pld()
5370 constraint (!inst.operands[0].isreg, in do_pli()
5372 constraint (inst.operands[0].postind, in do_pli()
5374 constraint (inst.operands[0].writeback, in do_pli()
5376 constraint (!inst.operands[0].preind, in do_pli()
5554 constraint (!inst.operands[2].isreg || !inst.operands[2].preind in do_strex()
5562 constraint (inst.operands[0].reg == inst.operands[1].reg in do_strex()
5565 constraint (inst.reloc.exp.X_op != O_constant in do_strex()
5578 constraint (inst.operands[1].reg % 2 != 0, in do_strexd()
5580 constraint (inst.operands[2].present in do_strexd()
5585 constraint (inst.operands[1].reg == REG_LR, _("r14 not allowed here")); in do_strexd()
5587 constraint (inst.operands[0].reg == inst.operands[1].reg in do_strexd()
5676 constraint (inst.operands[2].imm != 2, in do_vfp_reg2_from_sp2()
5693 constraint (inst.operands[0].imm != 2, in do_vfp_sp2_from_reg2()
5721 constraint (ldstm_type != VFP_LDSTMIA, in vfp_sp_ldstm()
5736 constraint (ldstm_type != VFP_LDSTMIA && ldstm_type != VFP_LDSTMIAX, in vfp_dp_ldstm()
5813 constraint (inst.reloc.exp.X_op != O_constant in do_fpa_ldmstm()
5838 constraint (inst.operands[0].reg != REG_PC, _("only r15 allowed here")); in do_iwmmxt_tandorc()
5908 constraint (inst.cond != COND_ALWAYS, BAD_COND); in do_iwmmxt_wldstw()
6025 constraint (inst.operands[0].reg == inst.operands[1].reg, BAD_OVERLAP); in do_xsc_mra()
6041 constraint (inst.operands[i].immisreg, in encode_thumb32_shifted_operand()
6048 constraint (inst.reloc.exp.X_op != O_constant, in encode_thumb32_shifted_operand()
6051 constraint (value > 32 in encode_thumb32_shifted_operand()
6079 constraint (!inst.operands[i].isreg, in encode_thumb32_addr_mode()
6085 constraint (is_pc, _("cannot use register index with PC-relative addressing")); in encode_thumb32_addr_mode()
6086 constraint (is_t || is_d, _("cannot use register index with this instruction")); in encode_thumb32_addr_mode()
6087 constraint (inst.operands[i].negative, in encode_thumb32_addr_mode()
6089 constraint (inst.operands[i].postind, in encode_thumb32_addr_mode()
6091 constraint (inst.operands[i].writeback, in encode_thumb32_addr_mode()
6093 constraint (inst.operands[i].shifted && inst.operands[i].shift_kind != SHIFT_LSL, in encode_thumb32_addr_mode()
6099 constraint (inst.reloc.exp.X_op != O_constant, in encode_thumb32_addr_mode()
6101 constraint (inst.reloc.exp.X_add_number < 0 in encode_thumb32_addr_mode()
6110 constraint (is_pc && inst.operands[i].writeback, in encode_thumb32_addr_mode()
6112 constraint (is_t && inst.operands[i].writeback, in encode_thumb32_addr_mode()
6132 constraint (is_pc, _("cannot use post-indexing with PC-relative addressing")); in encode_thumb32_addr_mode()
6133 constraint (is_t, _("cannot use post-indexing with this instruction")); in encode_thumb32_addr_mode()
6260 constraint (Rd == 15, _("PC not allowed as destination")); in do_t_add_sub_w()
6323 constraint (inst.size_req == 2, BAD_HIREG); in do_t_add_sub()
6377 constraint (inst.operands[2].shifted && inst.operands[2].immisreg, in do_t_add_sub()
6387 constraint (inst.instruction == T_MNEM_adds in do_t_add_sub()
6393 constraint ((Rd > 7 && (Rd != REG_SP || Rs != REG_SP)) in do_t_add_sub()
6405 constraint (inst.operands[2].shifted, _("unshifted register required")); in do_t_add_sub()
6411 constraint (inst.instruction == T_MNEM_sub, BAD_HIREG); in do_t_add_sub()
6420 constraint (1, _("dest must overlap one source register")); in do_t_add_sub()
6517 constraint (inst.operands[2].shifted in do_t_arit3()
6531 constraint (THUMB_SETS_FLAGS (inst.instruction), BAD_THUMB32); in do_t_arit3()
6533 constraint (!inst.operands[2].isreg || inst.operands[2].shifted, in do_t_arit3()
6535 constraint (Rd > 7 || Rs > 7 || Rn > 7, BAD_HIREG); in do_t_arit3()
6536 constraint (Rd != Rs, in do_t_arit3()
6609 constraint (inst.operands[2].shifted in do_t_arit3c()
6623 constraint (THUMB_SETS_FLAGS (inst.instruction), BAD_THUMB32); in do_t_arit3c()
6625 constraint (!inst.operands[2].isreg || inst.operands[2].shifted, in do_t_arit3c()
6627 constraint (Rd > 7 || Rs > 7 || Rn > 7, BAD_HIREG); in do_t_arit3c()
6637 constraint (1, _("dest must overlap one source register")); in do_t_arit3c()
6646 constraint ((inst.instruction & 0xf0) != 0x40 in do_t_barrier()
6660 constraint (msb > 32, _("bit-field extends past end of register")); in do_t_bfc()
6680 constraint (msb > 32, _("bit-field extends past end of register")); in do_t_bfi()
6693 constraint (inst.operands[2].imm + inst.operands[3].imm > 32, in do_t_bfx()
6715 constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH); in do_t_blx()
6745 constraint (current_it_mask != 0x10, BAD_BRANCH); in do_t_branch()
6788 constraint (inst.cond != COND_ALWAYS, in do_t_bkpt()
6792 constraint (inst.operands[0].imm > 255, in do_t_bkpt()
6801 constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH); in do_t_branch23()
6820 constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH); in do_t_bx()
6830 constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH); in do_t_bxj()
6848 constraint (current_it_mask, BAD_NOT_IT); in do_t_cps()
6855 constraint (current_it_mask, BAD_NOT_IT); in do_t_cpsi()
6869 constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1) in do_t_cpsi()
6873 constraint (inst.operands[1].present || inst.size_req == 4, in do_t_cpsi()
6902 constraint (current_it_mask, BAD_NOT_IT); in do_t_czb()
6903 constraint (inst.operands[0].reg > 7, BAD_HIREG); in do_t_czb()
6939 constraint (current_it_mask, BAD_NOT_IT); in do_t_it()
6968 constraint (inst.reloc.type != BFD_RELOC_UNUSED, in do_t_ldmstm()
6970 constraint (inst.operands[1].writeback, in do_t_ldmstm()
7027 constraint (inst.operands[0].reg > 7 in do_t_ldmstm()
7057 constraint (!inst.operands[1].isreg || !inst.operands[1].preind in do_t_ldrex()
7073 constraint (inst.operands[0].reg == REG_LR, in do_t_ldrexd()
7078 constraint (inst.operands[0].reg == inst.operands[1].reg, in do_t_ldrexd()
7162 constraint (inst.operands[0].reg > 7, BAD_HIREG); in do_t_ldst()
7167 constraint (inst.operands[1].reg > 7 || inst.operands[1].imm > 7, BAD_HIREG); in do_t_ldst()
7168 constraint (!inst.operands[1].isreg || !inst.operands[1].immisreg in do_t_ldst()
7181 constraint (!inst.operands[1].preind in do_t_ldst()
7187 constraint (inst.instruction & 0x0600, in do_t_ldst()
7189 constraint (inst.operands[1].reg == REG_PC in do_t_ldst()
7192 constraint (inst.operands[1].immisreg, in do_t_ldst()
7207 constraint (inst.operands[1].reg > 7, BAD_HIREG); in do_t_ldst()
7218 constraint (inst.operands[1].imm > 7, BAD_HIREG); in do_t_ldst()
7219 constraint (inst.operands[1].negative, in do_t_ldst()
7247 constraint (inst.operands[0].reg == REG_LR, in do_t_ldstd()
7393 constraint (inst.operands[0].reg > 7, in do_t_mov_cmp()
7409 constraint (top, _(":lower16: not allowed this instruction")); in do_t_mov16()
7414 constraint (!top, _(":upper16: not allowed this instruction")); in do_t_mov16()
7471 constraint (inst.operands[1].shifted in do_t_mvn_tst()
7483 constraint (inst.instruction > 0xffff in do_t_mvn_tst()
7485 constraint (!inst.operands[1].isreg || inst.operands[1].shifted, in do_t_mvn_tst()
7487 constraint (inst.operands[0].reg > 7 || inst.operands[1].reg > 7, in do_t_mvn_tst()
7503 constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7m), in do_t_mrs()
7509 constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1), in do_t_mrs()
7513 constraint ((flags & ~SPSR_BIT) != (PSR_c|PSR_f), in do_t_mrs()
7527 constraint (!inst.operands[1].isreg, in do_t_msr()
7532 constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1), in do_t_msr()
7538 constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7m), in do_t_msr()
7565 constraint (!unified_syntax in do_t_mul()
7567 constraint (inst.operands[0].reg > 7 || inst.operands[1].reg > 7, in do_t_mul()
7578 constraint (1, _("dest must overlap one source register")); in do_t_mul()
7612 constraint (inst.operands[0].present, in do_t_nop()
7649 constraint (inst.operands[0].reg > 7 || inst.operands[1].reg > 7, in do_t_neg()
7651 constraint (THUMB_SETS_FLAGS (inst.instruction), BAD_THUMB32); in do_t_neg()
7668 constraint (inst.reloc.exp.X_op != O_constant, in do_t_pkhbt()
7694 constraint (inst.operands[0].writeback, in do_t_push_pop()
7696 constraint (inst.reloc.type != BFD_RELOC_UNUSED, in do_t_push_pop()
7807 constraint (current_it_mask, BAD_NOT_IT); in do_t_setend()
7905 constraint (inst.operands[0].reg > 7 in do_t_shift()
7907 constraint (THUMB_SETS_FLAGS (inst.instruction), BAD_THUMB32); in do_t_shift()
7911 constraint (inst.operands[2].reg > 7, BAD_HIREG); in do_t_shift()
7912 constraint (inst.operands[0].reg != inst.operands[1].reg, in do_t_shift()
7956 constraint (inst.reloc.exp.X_op != O_constant, in do_t_smc()
7973 constraint (inst.reloc.exp.X_op != O_constant, in do_t_ssat()
7998 constraint (!inst.operands[2].isreg || !inst.operands[2].preind in do_t_strex()
8016 constraint (inst.operands[0].reg == inst.operands[1].reg in do_t_strexd()
8058 constraint (inst.operands[2].present && inst.operands[2].imm != 0, in do_t_sxth()
8060 constraint (1, BAD_HIREG); in do_t_sxth()
8076 constraint (current_it_mask && current_it_mask != 0x10, BAD_BRANCH); in do_t_tb()
8077 constraint (inst.operands[0].immisreg, in do_t_tb()
8079 constraint (inst.operands[0].imm == 15, in do_t_tb()
8081 constraint (!half && inst.operands[0].shifted, in do_t_tb()
8095 constraint (inst.reloc.exp.X_op != O_constant, in do_t_usat()