358     Register ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in fastMaterializeAlloca()  local
381   Register ResultReg = createResultReg(RC);  in materializeInt()  local
417     Register ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local
435   Register ResultReg = createResultReg(TLI.getRegClassFor(VT));  in materializeFP()  local
459   unsigned ResultReg;  in materializeGV()  local
1061     Register ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in simplifyAddress()  local
1072     unsigned ResultReg = 0;  in simplifyAddress()  local
1106     unsigned ResultReg;  in simplifyAddress()  local
1212   unsigned ResultReg = 0;  in emitAddSub()  local
1326   unsigned ResultReg;  in emitAddSub_rr()  local
1371   unsigned ResultReg;  in emitAddSub_ri()  local
1412   unsigned ResultReg;  in emitAddSub_rs()  local
1456   unsigned ResultReg;  in emitAddSub_rx()  local
1550   unsigned ResultReg;  in emitAdd_ri_()  local
1608   unsigned ResultReg = 0;  in emitLogicalOp()  local
1700   Register ResultReg =  in emitLogicalOp_ri()  local
1742   Register ResultReg =  in emitLogicalOp_rs()  local
1868   Register ResultReg = createResultReg(RC);  in emitLoad()  local
1902   unsigned ResultReg;  in selectAddSub()  local
1928   unsigned ResultReg;  in selectLogicalOp()  local
1997   unsigned ResultReg =  in selectLoad()  local
2545   unsigned ResultReg = 0;  in selectCmp()  local
2668   Register ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg,  in optimizeSelect()  local
2789   Register ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src2Reg, CC);  in selectSelect()  local
2803   Register ResultReg = createResultReg(&AArch64::FPR64RegClass);  in selectFPExt()  local
2819   Register ResultReg = createResultReg(&AArch64::FPR32RegClass);  in selectFPTrunc()  local
2852   Register ResultReg = createResultReg(  in selectFPToInt()  local
2898   Register ResultReg = fastEmitInst_r(Opc, TLI.getRegClassFor(DestVT), SrcReg);  in selectIntToFP()  local
3006     Register ResultReg = createResultReg(RC);  in fastLowerArguments()  local
3131     Register ResultReg = createResultReg(TLI.getRegClassFor(CopyVT));  in finishCall()  local
3334     unsigned ResultReg = emitLoad(VT, VT, Src);  in tryEmitSmallMemCpy()  local
3478     Register ResultReg = createResultReg(&AArch64::GPR64spRegClass);  in fastLowerIntrinsicCall()  local
3613     Register ResultReg = createResultReg(TLI.getRegClassFor(VT));  in fastLowerIntrinsicCall()  local
3639     unsigned ResultReg = fastEmit_r(VT, VT, ISD::FSQRT, Op0Reg);  in fastLowerIntrinsicCall()  local
3930   unsigned ResultReg;  in selectTrunc()  local
3973     unsigned ResultReg = emitAnd_ri(MVT::i32, SrcReg, 1);  in emiti1Ext()  local
4049   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitLSL_rr()  local
4075       Register ResultReg = createResultReg(RC);  in emitLSL_ri()  local
4152   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitLSR_rr()  local
4178       Register ResultReg = createResultReg(RC);  in emitLSR_ri()  local
4268   Register ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op1Reg);  in emitASR_rr()  local
4294       Register ResultReg = createResultReg(RC);  in emitASR_ri()  local
4541         Register ResultReg = createResultReg(&AArch64::GPR64RegClass);  in selectIntExt()  local
4555   unsigned ResultReg = emitIntExt(SrcVT, SrcReg, RetVT, IsZExt);  in selectIntExt()  local
4599   Register ResultReg = fastEmitInst_rrr(MSubOpc, RC, QuotReg, Src1Reg, Src0Reg);  in selectRem()  local
4648       unsigned ResultReg =  in selectMul()  local
4665   unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src1Reg);  in selectMul()  local
4683     unsigned ResultReg = 0;  in selectShift()  local
4739   unsigned ResultReg = 0;  in selectShift()  local
4792   Register ResultReg = fastEmitInst_r(Opc, RC, Op0Reg);  in selectBitCast()  local
4857     unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Lg2);  in selectSDiv()  local
4890   unsigned ResultReg;  in selectSDiv()  local