Lines Matching refs:phys_addr
105 static int pcitool_access(pci_t *pci_p, uint64_t phys_addr, uint64_t max_addr,
556 pcitool_access(pci_t *pci_p, uint64_t phys_addr, uint64_t max_addr, in pcitool_access() argument
565 if (phys_addr > max_addr) { in pcitool_access()
568 phys_addr, max_addr); in pcitool_access()
574 } else if (!IS_P2ALIGNED(phys_addr, size)) { in pcitool_access()
585 size, (endian ? "BE" : "LE"), phys_addr); in pcitool_access()
587 if (pcitool_phys_poke(pci_p, endian, size, phys_addr, in pcitool_access()
592 size, (endian ? "BE" : "LE"), phys_addr); in pcitool_access()
602 size, (endian ? "BE" : "LE"), phys_addr); in pcitool_access()
604 if (pcitool_phys_peek(pci_p, endian, size, phys_addr, in pcitool_access()
609 size, (endian ? "BE" : "LE"), phys_addr); in pcitool_access()
670 base_addr = pci_rp[prg.barnum].phys_addr; in pcitool_bus_reg_ops()
672 prg.phys_addr = base_addr + prg.offset; in pcitool_bus_reg_ops()
677 base_addr, prg.offset, prg.phys_addr, max_addr); in pcitool_bus_reg_ops()
681 prg.phys_addr, max_addr, &prg.data, size, write_flag, in pcitool_bus_reg_ops()
816 prg->phys_addr = base_addr + prg->offset; in pcitool_config_request()
820 base_addr, prg->offset, prg->phys_addr, in pcitool_config_request()
824 rval = pcitool_access(pci_p, prg->phys_addr, max_addr, &prg->data, size, in pcitool_config_request()
969 prg.phys_addr = base_addr + prg.offset; in pcitool_dev_reg_ops()
970 rval = pcitool_access(pci_p, prg.phys_addr, in pcitool_dev_reg_ops()