Lines Matching refs:uint32_t
308 uint32_t _val32;
310 uint32_t RQRte:4; /* 3:0 */
311 uint32_t reserved1:4; /* 7:4 */
312 uint32_t RPRte:4; /* 11:8 */
313 uint32_t reserved2:4; /* 15:12 */
314 uint32_t BCRte:4; /* 19:16 */
315 uint32_t reserved3:12; /* 31:20 */
323 uint32_t _val32;
325 uint32_t NodeId:3; /* 2:0 */
326 uint32_t reserved1:1; /* 3:3 */
327 uint32_t NodeCnt:3; /* 6:4 */
328 uint32_t reserved2:1; /* 7:7 */
329 uint32_t SbNode:3; /* 10:8 */
330 uint32_t reserved3:1; /* 11:11 */
331 uint32_t LkNode:3; /* 14:12 */
332 uint32_t reserved4:1; /* 15:15 */
333 uint32_t CpuCnt:4; /* 19:16 */
334 uint32_t reserved:12; /* 31:20 */
345 uint32_t _val32;
347 uint32_t C0Unit:2; /* 1:0 */
348 uint32_t C1Unit:2; /* 3:2 */
349 uint32_t McUnit:2; /* 5:4 */
350 uint32_t HbUnit:2; /* 7:6 */
351 uint32_t SbLink:2; /* 9:8 */
352 uint32_t reserved:22; /* 31:10 */
362 uint32_t _val32;
364 uint32_t RE:1; /* 0:0 - Read Enable */
365 uint32_t WE:1; /* 1:1 - Write Enable */
366 uint32_t reserved1:6; /* 7:2 */
367 uint32_t IntlvEn:3; /* 10:8 - Interleave Enable */
368 uint32_t reserved2:5; /* 15:11 */
369 uint32_t DRAMBasei:16; /* 31:16 - Base Addr 39:24 */
381 uint32_t _val32;
383 uint32_t DstNode:3; /* 2:0 - Destination Node */
384 uint32_t reserved1:5; /* 7:3 */
385 uint32_t IntlvSel:3; /* 10:8 - Interleave Select */
386 uint32_t reserved2:5; /* 15:11 */
387 uint32_t DRAMLimiti:16; /* 31:16 - Limit Addr 39:24 */
400 uint32_t _val32;
402 uint32_t DramHoleValid:1; /* 0:0 */
403 uint32_t reserved1:7; /* 7:1 */
404 uint32_t DramHoleOffset:8; /* 15:8 */
405 uint32_t reserved2:8; /* 23:16 */
406 uint32_t DramHoleBase:8; /* 31:24 */
417 uint32_t _val32;
422 uint32_t CSEnable:1; /* 0:0 - CS Bank Enable */
423 uint32_t reserved1:8; /* 8:1 */
424 uint32_t BaseAddrLo:7; /* 15:9 - Base Addr 19:13 */
425 uint32_t reserved2:5; /* 20:16 */
426 uint32_t BaseAddrHi:11; /* 31:21 - Base Addr 35:25 */
432 uint32_t CSEnable:1; /* 0:0 - CS Bank Enable */
433 uint32_t Spare:1; /* 1:1 - Spare Rank */
434 uint32_t TestFail:1; /* 2:2 - Memory Test Failed */
435 uint32_t reserved1:2; /* 4:3 */
436 uint32_t BaseAddrLo:9; /* 13:5 - Base Addr 21:13 */
437 uint32_t reserved2:5; /* 18:14 */
438 uint32_t BaseAddrHi:10; /* 28:19 - Base Addr 36:27 */
439 uint32_t reserved3:3; /* 31:39 */
454 uint32_t _val32;
459 uint32_t reserved1:9; /* 8:0 */
460 uint32_t AddrMaskLo:7; /* 15:9 - Addr Mask 19:13 */
461 uint32_t reserved2:5; /* 20:16 */
462 uint32_t AddrMaskHi:9; /* 29:21 - Addr Mask 33:25 */
463 uint32_t reserved3:2; /* 31:30 */
469 uint32_t reserved1:5; /* 4:0 */
470 uint32_t AddrMaskLo:9; /* 13:5 - Addr Mask 21:13 */
471 uint32_t reserved2:5; /* 18:14 */
472 uint32_t AddrMaskHi:10; /* 28:19 - Addr Mask 36:27 */
473 uint32_t reserved3:3; /* 31:29 */
496 uint32_t _val32;
501 uint32_t cs10:4; /* 3:0 - CS1/0 */
502 uint32_t cs32:4; /* 7:4 - CS3/2 */
503 uint32_t cs54:4; /* 11:8 - CS5/4 */
504 uint32_t cs76:4; /* 15:12 - CS7/6 */
505 uint32_t reserved1:14; /* 29:16 */
506 uint32_t BankSwizzleMode:1; /* 30:30 */
507 uint32_t reserved2:1; /* 31:31 */
513 uint32_t cs10:4; /* 3:0 - CS1/0 */
514 uint32_t cs32:4; /* 7:4 - CS3/2 */
515 uint32_t cs54:4; /* 11:8 - CS5/4 */
516 uint32_t cs76:4; /* 15:12 - CS7/6 */
517 uint32_t reserved1:16; /* 31:16 */
523 uint32_t allcsmodes:16; /* 15:0 */
524 uint32_t pad:16; /* 31:16 */
539 uint32_t _val32;
547 uint32_t DLL_Dis:1; /* 0 */
548 uint32_t D_DRV:1; /* 1 */
549 uint32_t QFC_EN:1; /* 2 */
550 uint32_t DisDqsHys:1; /* 3 */
551 uint32_t reserved1:1; /* 4 */
552 uint32_t Burst2Opt:1; /* 5 */
553 uint32_t Mod64BitMux:1; /* 6 */
554 uint32_t ambig1:1; /* 7 */
555 uint32_t DramInit:1; /* 8 */
556 uint32_t DualDimmEn:1; /* 9 */
557 uint32_t DramEnable:1; /* 10 */
558 uint32_t MemClrStatus:1; /* 11 */
559 uint32_t ESR:1; /* 12 */
560 uint32_t SR_S:1; /* 13 */
561 uint32_t RdWrQByp:2; /* 15:14 */
562 uint32_t Width128:1; /* 16 */
563 uint32_t DimmEcEn:1; /* 17 */
564 uint32_t UnBufDimm:1; /* 18 */
565 uint32_t ByteEn32:1; /* 19 */
566 uint32_t x4DIMMs:4; /* 23:20 */
567 uint32_t DisInRcvrs:1; /* 24 */
568 uint32_t BypMax:3; /* 27:25 */
569 uint32_t En2T:1; /* 28 */
570 uint32_t UpperCSMap:1; /* 29 */
571 uint32_t PwrDownCtl:2; /* 31:30 */
577 uint32_t InitDram:1; /* 0 */
578 uint32_t ExitSelfRef:1; /* 1 */
579 uint32_t reserved1:2; /* 3:2 */
580 uint32_t DramTerm:2; /* 5:4 */
581 uint32_t reserved2:1; /* 6 */
582 uint32_t DramDrvWeak:1; /* 7 */
583 uint32_t ParEn:1; /* 8 */
584 uint32_t SelRefRateEn:1; /* 9 */
585 uint32_t BurstLength32:1; /* 10 */
586 uint32_t Width128:1; /* 11 */
587 uint32_t x4DIMMs:4; /* 15:12 */
588 uint32_t UnBuffDimm:1; /* 16 */
589 uint32_t reserved3:2; /* 18:17 */
590 uint32_t DimmEccEn:1; /* 19 */
591 uint32_t reserved4:12; /* 31:20 */
600 uint32_t _val32;
605 uint32_t reserved2:1; /* 0 */
606 uint32_t DisableJitter:1; /* 1 */
607 uint32_t RdWrQByp:2; /* 3:2 */
608 uint32_t Mod64Mux:1; /* 4 */
609 uint32_t DCC_EN:1; /* 5 */
610 uint32_t ILD_lmt:3; /* 8:6 */
611 uint32_t DramEnabled:1; /* 9 */
612 uint32_t PwrSavingsEn:1; /* 10 */
613 uint32_t reserved1:13; /* 23:11 */
614 uint32_t MemClkDis:8; /* 31:24 */
619 uint32_t _val32;
624 uint32_t AsyncLat:4; /* 3:0 */
625 uint32_t reserved1:4; /* 7:4 */
626 uint32_t RdPreamble:4; /* 11:8 */
627 uint32_t reserved2:1; /* 12 */
628 uint32_t MemDQDrvStren:2; /* 14:13 */
629 uint32_t DisableJitter:1; /* 15 */
630 uint32_t ILD_lmt:3; /* 18:16 */
631 uint32_t DCC_EN:1; /* 19 */
632 uint32_t MemClk:3; /* 22:20 */
633 uint32_t reserved3:2; /* 24:23 */
634 uint32_t MCR:1; /* 25 */
635 uint32_t MC0_EN:1; /* 26 */
636 uint32_t MC1_EN:1; /* 27 */
637 uint32_t MC2_EN:1; /* 28 */
638 uint32_t MC3_EN:1; /* 29 */
639 uint32_t reserved4:1; /* 30 */
640 uint32_t OddDivisorCorrect:1; /* 31 */
646 uint32_t MemClkFreq:3; /* 2:0 */
647 uint32_t MemClkFreqVal:1; /* 3 */
648 uint32_t MaxAsyncLat:4; /* 7:4 */
649 uint32_t reserved1:4; /* 11:8 */
650 uint32_t RDqsEn:1; /* 12 */
651 uint32_t reserved2:1; /* 13 */
652 uint32_t DisDramInterface:1; /* 14 */
653 uint32_t PowerDownEn:1; /* 15 */
654 uint32_t PowerDownMode:1; /* 16 */
655 uint32_t FourRankSODimm:1; /* 17 */
656 uint32_t FourRankRDimm:1; /* 18 */
657 uint32_t reserved3:1; /* 19 */
658 uint32_t SlowAccessMode:1; /* 20 */
659 uint32_t reserved4:1; /* 21 */
660 uint32_t BankSwizzleMode:1; /* 22 */
661 uint32_t undocumented1:1; /* 23 */
662 uint32_t DcqBypassMax:4; /* 27:24 */
663 uint32_t FourActWindow:4; /* 31:28 */
672 uint32_t _val32;
674 uint32_t DramScrub:5; /* 4:0 */
675 uint32_t reserved3:3; /* 7:5 */
676 uint32_t L2Scrub:5; /* 12:8 */
677 uint32_t reserved2:3; /* 15:13 */
678 uint32_t DcacheScrub:5; /* 20:16 */
679 uint32_t reserved1:11; /* 31:21 */
684 uint32_t _val32;
686 uint32_t ScrubReDirEn:1; /* 0 */
687 uint32_t reserved:5; /* 5:1 */
688 uint32_t ScrubAddrLo:26; /* 31:6 */
693 uint32_t _val32;
695 uint32_t ScrubAddrHi:8; /* 7:0 */
696 uint32_t reserved:24; /* 31:8 */
705 uint32_t _val32;
710 uint32_t CpuEccErrEn:1; /* 0 */
711 uint32_t CpuRdDatErrEn:1; /* 1 */
712 uint32_t SyncOnUcEccEn:1; /* 2 */
713 uint32_t SyncPktGenDis:1; /* 3 */
714 uint32_t SyncPktPropDis:1; /* 4 */
715 uint32_t IoMstAbortDis:1; /* 5 */
716 uint32_t CpuErrDis:1; /* 6 */
717 uint32_t IoErrDis:1; /* 7 */
718 uint32_t WdogTmrDis:1; /* 8 */
719 uint32_t WdogTmrCntSel:3; /* 11:9 */
720 uint32_t WdogTmrBaseSel:2; /* 13:12 */
721 uint32_t LdtLinkSel:2; /* 15:14 */
722 uint32_t GenCrcErrByte0:1; /* 16 */
723 uint32_t GenCrcErrByte1:1; /* 17 */
724 uint32_t reserved1:2; /* 19:18 */
725 uint32_t SyncOnWdogEn:1; /* 20 */
726 uint32_t SyncOnAnyErrEn:1; /* 21 */
727 uint32_t EccEn:1; /* 22 */
728 uint32_t ChipKillEccEn:1; /* 23 */
729 uint32_t IoRdDatErrEn:1; /* 24 */
730 uint32_t DisPciCfgCpuErrRsp:1; /* 25 */
731 uint32_t reserved2:1; /* 26 */
732 uint32_t NbMcaToMstCpuEn:1; /* 27 */
733 uint32_t reserved3:4; /* 31:28 */
739 uint32_t CpuEccErrEn:1; /* 0 */
740 uint32_t CpuRdDatErrEn:1; /* 1 */
741 uint32_t SyncOnUcEccEn:1; /* 2 */
742 uint32_t SyncPktGenDis:1; /* 3 */
743 uint32_t SyncPktPropDis:1; /* 4 */
744 uint32_t IoMstAbortDis:1; /* 5 */
745 uint32_t CpuErrDis:1; /* 6 */
746 uint32_t IoErrDis:1; /* 7 */
747 uint32_t WdogTmrDis:1; /* 8 */
748 uint32_t WdogTmrCntSel:3; /* 11:9 */
749 uint32_t WdogTmrBaseSel:2; /* 13:12 */
750 uint32_t LdtLinkSel:2; /* 15:14 */
751 uint32_t GenCrcErrByte0:1; /* 16 */
752 uint32_t GenCrcErrByte1:1; /* 17 */
753 uint32_t reserved1:2; /* 19:18 */
754 uint32_t SyncOnWdogEn:1; /* 20 */
755 uint32_t SyncOnAnyErrEn:1; /* 21 */
756 uint32_t EccEn:1; /* 22 */
757 uint32_t ChipKillEccEn:1; /* 23 */
758 uint32_t IoRdDatErrEn:1; /* 24 */
759 uint32_t DisPciCfgCpuErrRsp:1; /* 25 */
760 uint32_t reserved2:1; /* 26 */
761 uint32_t NbMcaToMstCpuEn:1; /* 27 */
762 uint32_t DisTgtAbtCpuErrRsp:1; /* 28 */
763 uint32_t DisMstAbtCpuErrRsp:1; /* 29 */
764 uint32_t SyncOnDramAdrParErrEn:1; /* 30 */
765 uint32_t reserved3:1; /* 31 */
775 uint32_t _val32;
780 uint32_t SwapEn:1; /* 0 */
781 uint32_t SwapDone:1; /* 1 */
782 uint32_t reserved1:2; /* 3:2 */
783 uint32_t BadDramCs:3; /* 6:4 */
784 uint32_t reserved2:5; /* 11:7 */
785 uint32_t SwapDoneInt:2; /* 13:12 */
786 uint32_t EccErrInt:2; /* 15:14 */
787 uint32_t EccErrCntDramCs:3; /* 18:16 */
788 uint32_t reserved3:1; /* 19 */
789 uint32_t EccErrCntDramChan:1; /* 20 */
790 uint32_t reserved4:2; /* 22:21 */
791 uint32_t EccErrCntWrEn:1; /* 23 */
792 uint32_t EccErrCnt:4; /* 27:24 */
793 uint32_t reserved5:4; /* 31:28 */
799 uint32_t SwapEn0:1; /* 0 */
800 uint32_t SwapDone0:1; /* 1 */
801 uint32_t SwapEn1:1; /* 2 */
802 uint32_t SwapDone1:1; /* 3 */
803 uint32_t BadDramCs0:3; /* 6:4 */
804 uint32_t reserved1:1; /* 7 */
805 uint32_t BadDramCs1:3; /* 10:8 */
806 uint32_t reserved2:1; /* 11 */
807 uint32_t SwapDoneInt:2; /* 13:12 */
808 uint32_t EccErrInt:2; /* 15:14 */
809 uint32_t EccErrCntDramCs:4; /* 19:16 */
810 uint32_t EccErrCntDramChan:2; /* 21:20 */
811 uint32_t reserved4:1; /* 22 */
812 uint32_t EccErrCntWrEn:1; /* 23 */
813 uint32_t EccErrCnt:4; /* 27:24 */
814 uint32_t LvtOffset:4; /* 31:28 */
854 uint32_t _reserved; /* 31:0 */
860 uint32_t _ErrCount:12; /* 43:32 */
861 uint32_t _reserved1:4; /* 47:44 */
862 uint32_t _Ovrflw:1; /* 48 */
863 uint32_t _IntType:2; /* 50:49 */
864 uint32_t _CntEn:1; /* 51 */
865 uint32_t _LvtOff:4; /* 55:52 */
866 uint32_t _reserved2:5; /* 60:56 */
867 uint32_t _Locked:1; /* 61 */
868 uint32_t _CntP:1; /* 62 */
869 uint32_t _Valid:1; /* 63 */
880 uint32_t _reserved:24; /* 23:0 */
881 uint32_t _BlkPtr:8; /* 31:24 */
887 uint32_t _ErrCnt:12; /* 43:32 */
888 uint32_t _reserved1:4; /* 47:44 */
889 uint32_t _Ovrflw:1; /* 48 */
890 uint32_t _IntType:2; /* 50:49 */
891 uint32_t _CntEn:1; /* 51 */
892 uint32_t _LvtOff:4; /* 55:52 */
893 uint32_t _reserved2:5; /* 60:56 */
894 uint32_t _Locked:1; /* 61 */
895 uint32_t _CntP:1; /* 62 */
896 uint32_t _Valid:1; /* 63 */