Lines Matching defs:ci
673 disable_tsc(struct cpu_info *ci)
675 if (ci->ci_feat_val[0] & CPUID_TSC) {
676 ci->ci_feat_val[0] &= ~CPUID_TSC;
682 amd_family5_setup(struct cpu_info *ci)
685 switch (ci->ci_model) {
693 if (ci->ci_feat_val[0] & CPUID_APIC)
694 ci->ci_feat_val[0] =
695 (ci->ci_feat_val[0] & ~CPUID_APIC) | CPUID_PGE;
705 cyrix6x86_cpu_setup(struct cpu_info *ci)
712 if (ci->ci_signature != 0x552)
713 disable_tsc(ci);
717 winchip_cpu_setup(struct cpu_info *ci)
719 switch (ci->ci_model) {
721 disable_tsc(ci);
727 intel_family6_name(struct cpu_info *ci)
730 u_int l2cache = ci->ci_cinfo[CAI_L2CACHE].cai_totalsize;
732 if (ci->ci_model == 5) {
749 } else if (ci->ci_model == 6) {
756 } else if (ci->ci_model == 7) {
766 } else if (ci->ci_model >= 8) {
767 if (ci->ci_brand_id && ci->ci_brand_id < 0x10) {
768 switch (ci->ci_brand_id) {
770 if (ci->ci_signature == 0x6B1)
774 if (ci->ci_signature >= 0xF13)
778 if (ci->ci_signature >= 0xF13)
782 if (ci->ci_signature < 0xF13)
787 ret = i386_intel_brand[ci->ci_brand_id];
808 amd_amd64_name(struct cpu_info *ci)
814 switch (ci->ci_family) {
816 switch (ci->ci_model) {
882 snprintf(family_str, sizeof family_str, "Family %xh", ci->ci_family);
887 intel_family_new_probe(struct cpu_info *ci)
898 ci->ci_feat_val[2] |= descs[3];
899 ci->ci_feat_val[3] |= descs[2];
904 via_cpu_probe(struct cpu_info *ci)
906 u_int stepping = CPUID_TO_STEPPING(ci->ci_signature);
921 ci->ci_feat_val[2] |= descs[3];
924 if (ci->ci_model < 0x9 || (ci->ci_model == 0x9 && stepping < 3))
935 ci->ci_feat_val[4] = lfunc;
939 amd_family6_probe(struct cpu_info *ci)
952 ci->ci_feat_val[2] |= descs[3]; /* %edx */
953 ci->ci_feat_val[3] = descs[2]; /* %ecx */
961 ci->ci_brand_id = i;
968 intel_cpu_cacheinfo(struct cpu_info *ci)
978 if (ci->ci_cpu_type >= 0)
981 if (ci->ci_max_cpuid < 2)
1008 ci->ci_cinfo[cai->cai_index] = *cai;
1011 aprint_error_dev(ci->ci_dev, "error:"
1019 if (ci->ci_max_cpuid < 4)
1023 cpu_dcp_cacheinfo(ci, 4);
1025 if (ci->ci_max_cpuid < 0x18)
1055 aprint_error_dev(ci->ci_dev,
1074 aprint_error_dev(ci->ci_dev,
1117 aprint_error_dev(ci->ci_dev, "error: "
1135 aprint_error_dev(ci->ci_dev,
1162 aprint_error_dev(ci->ci_dev, "WARNING: Currently "
1171 ci->ci_cinfo[caitype].cai_totalsize
1173 ci->ci_cinfo[caitype].cai_associativity
1175 ci->ci_cinfo[caitype].cai_linesize = linesize; /* pg size */
1183 amd_cpu_cacheinfo(struct cpu_info *ci)
1192 if (ci->ci_family == 5 && ci->ci_model == 0)
1206 if ((ci->ci_family == 5 && ci->ci_model >= 9) || ci->ci_family >= 6) {
1207 cai = &ci->ci_cinfo[CAI_ITLB2];
1212 cai = &ci->ci_cinfo[CAI_DTLB2];
1218 cai = &ci->ci_cinfo[CAI_ITLB];
1223 cai = &ci->ci_cinfo[CAI_DTLB];
1228 cai = &ci->ci_cinfo[CAI_DCACHE];
1233 cai = &ci->ci_cinfo[CAI_ICACHE];
1248 cai = &ci->ci_cinfo[CAI_L2_ITLB];
1260 cai = &ci->ci_cinfo[CAI_L2_ITLB2];
1272 cai = &ci->ci_cinfo[CAI_L2_DTLB];
1284 cai = &ci->ci_cinfo[CAI_L2_DTLB2];
1296 cai = &ci->ci_cinfo[CAI_L2CACHE];
1309 if (ci->ci_family >= 0x10) {
1310 cai = &ci->ci_cinfo[CAI_L3CACHE];
1329 cai = &ci->ci_cinfo[CAI_L1_1GBITLB];
1340 cai = &ci->ci_cinfo[CAI_L1_1GBDTLB];
1351 cai = &ci->ci_cinfo[CAI_L2_1GBITLB];
1363 cai = &ci->ci_cinfo[CAI_L2_1GBDTLB];
1378 if (ci->ci_feat_val[3] & CPUID_TOPOEXT)
1379 cpu_dcp_cacheinfo(ci, 0x8000001d);
1383 via_cpu_cacheinfo(struct cpu_info *ci)
1390 stepping = CPUID_TO_STEPPING(ci->ci_signature);
1408 cai = &ci->ci_cinfo[CAI_ITLB];
1413 cai = &ci->ci_cinfo[CAI_DTLB];
1418 cai = &ci->ci_cinfo[CAI_DCACHE];
1422 if (ci->ci_model == 9 && stepping == 8) {
1427 cai = &ci->ci_cinfo[CAI_ICACHE];
1431 if (ci->ci_model == 9 && stepping == 8) {
1446 cai = &ci->ci_cinfo[CAI_L2CACHE];
1447 if (ci->ci_model >= 9) {
1470 transmeta_cpu_info(struct cpu_info *ci)
1479 aprint_verbose_dev(ci->ci_dev, "Processor revision %u.%u.%u.%u\n",
1487 aprint_verbose_dev(ci->ci_dev, "Code Morphing Software Rev: %u.%u.%u-%u-%u\n",
1505 aprint_verbose_dev(ci->ci_dev, "%s\n", info.text);
1511 aprint_verbose_dev(ci->ci_dev, "LongRun <%dMHz %dmV %d%%>\n",
1517 cpu_probe_base_features(struct cpu_info *ci, const char *cpuname)
1523 memset(ci, 0, sizeof(*ci));
1524 ci->ci_dev = cpuname;
1526 ci->ci_cpu_type = x86_identify();
1527 if (ci->ci_cpu_type >= 0) {
1529 ci->ci_max_cpuid = -1;
1544 ci->ci_max_cpuid = descs[0];
1546 ci->ci_vendor[0] = descs[1];
1547 ci->ci_vendor[2] = descs[2];
1548 ci->ci_vendor[1] = descs[3];
1549 ci->ci_vendor[3] = 0;
1557 ci->ci_max_ext_cpuid = descs[0];
1560 ci->ci_max_ext_cpuid = 0;
1567 if (ci->ci_max_ext_cpuid >= 0x80000004) {
1577 if (ci->ci_max_cpuid < 1)
1588 ci->ci_signature = descs[0];
1591 ci->ci_family = CPUID_TO_FAMILY(ci->ci_signature);
1592 ci->ci_model = CPUID_TO_MODEL(ci->ci_signature);
1595 ci->ci_brand_id = __SHIFTOUT(descs[1], CPUID_BRAND_INDEX);
1597 ci->ci_initapicid = __SHIFTOUT(descs[1], CPUID_LOCAL_APIC_ID);
1599 ci->ci_feat_val[1] = descs[2];
1600 ci->ci_feat_val[0] = descs[3];
1602 if (ci->ci_max_cpuid < 3)
1609 if ((ci->ci_feat_val[0] & CPUID_PSN) != 0) {
1610 ci->ci_cpu_serial[0] = ci->ci_signature;
1612 ci->ci_cpu_serial[2] = descs[2];
1613 ci->ci_cpu_serial[1] = descs[3];
1616 if (ci->ci_max_cpuid < 0x7)
1620 ci->ci_feat_val[5] = descs[1];
1621 ci->ci_feat_val[6] = descs[2];
1622 ci->ci_feat_val[7] = descs[3];
1624 if (ci->ci_max_cpuid < 0xd)
1629 ci->ci_feat_val[8] = descs[0]; /* Actually 64 bits */
1630 ci->ci_cur_xsave = descs[1];
1631 ci->ci_max_xsave = descs[2];
1635 ci->ci_feat_val[9] = descs[0]; /* Actually 64 bits */
1639 cpu_probe_hv_features(struct cpu_info *ci, const char *cpuname)
1655 if ((ci->ci_feat_val[1] & CPUID2_RAZ) != 0) {
1693 cpu_probe_features(struct cpu_info *ci)
1698 if (ci->ci_max_cpuid < 1)
1702 if (!strncmp((char *)ci->ci_vendor,
1712 i = ci->ci_family - CPU_MINFAMILY;
1720 (*cpup->cpu_family[i].cpu_probe)(ci);
1770 identifycpu_cpuids_intel_0x04(struct cpu_info *ci)
1782 if ((ci->ci_feat_val[0] & CPUID_HTT) != 0) {
1795 ci->ci_packageid = ci->ci_initapicid >> (smt_bits + core_bits);
1798 ci->ci_coreid = __SHIFTOUT(ci->ci_initapicid,
1802 ci->ci_smtid = __SHIFTOUT(ci->ci_initapicid,
1807 identifycpu_cpuids_intel_0x0b(struct cpu_info *ci)
1809 const char *cpuname = ci->ci_dev;
1816 identifycpu_cpuids_intel_0x04(ci);
1851 ci->ci_packageid = ci->ci_initapicid >> pkg_shift;
1854 ci->ci_coreid = __SHIFTOUT(ci->ci_initapicid,
1858 ci->ci_smtid = __SHIFTOUT(ci->ci_initapicid,
1863 identifycpu_cpuids_intel(struct cpu_info *ci)
1865 const char *cpuname = ci->ci_dev;
1867 if (ci->ci_max_cpuid >= 0x0b)
1868 identifycpu_cpuids_intel_0x0b(ci);
1869 else if (ci->ci_max_cpuid >= 4)
1870 identifycpu_cpuids_intel_0x04(ci);
1873 ci->ci_packageid);
1874 aprint_verbose("%s: Core ID %u\n", cpuname, ci->ci_coreid);
1875 aprint_verbose("%s: SMT ID %u\n", cpuname, ci->ci_smtid);
1879 identifycpu_cpuids_amd(struct cpu_info *ci)
1881 const char *cpuname = ci->ci_dev;
1886 apic_id = ci->ci_initapicid;
1887 cpu_family = CPUID_TO_FAMILY(ci->ci_signature);
1892 if ((ci->ci_feat_val[0] & CPUID_HTT) != 0) {
1896 if (cpu_family >= 0x10 && ci->ci_max_ext_cpuid >= 0x8000008) {
1933 ci->ci_packageid = 0;
1937 ci->ci_coreid = __SHIFTOUT(apic_id, core_mask);
1941 ci->ci_smtid = __SHIFTOUT(apic_id, smt_mask);
1945 ci->ci_packageid);
1946 aprint_verbose("%s: Core ID %u\n", cpuname, ci->ci_coreid);
1947 aprint_verbose("%s: SMT ID %u\n", cpuname, ci->ci_smtid);
1951 identifycpu_cpuids(struct cpu_info *ci)
1953 const char *cpuname = ci->ci_dev;
1955 aprint_verbose("%s: Initial APIC ID %u\n", cpuname, ci->ci_initapicid);
1956 ci->ci_packageid = ci->ci_initapicid;
1957 ci->ci_coreid = 0;
1958 ci->ci_smtid = 0;
1961 identifycpu_cpuids_intel(ci);
1963 identifycpu_cpuids_amd(ci);
1975 struct cpu_info *ci, cistore;
1984 ci = &cistore;
1985 cpu_probe_base_features(ci, cpuname);
1986 dump_descs(0x00000000, ci->ci_max_cpuid, cpuname, "basic");
1987 if ((ci->ci_feat_val[1] & CPUID2_RAZ) != 0) {
1991 dump_descs(0x80000000, ci->ci_max_ext_cpuid, cpuname, "extended");
1993 cpu_probe_hv_features(ci, cpuname);
1994 cpu_probe_features(ci);
1996 if (ci->ci_cpu_type >= 0) {
1998 if (ci->ci_cpu_type >= (int)__arraycount(i386_nocpuid_cpus))
1999 errx(1, "unknown cpu type %d", ci->ci_cpu_type);
2000 name = i386_nocpuid_cpus[ci->ci_cpu_type].cpu_name;
2001 cpu_vendor = i386_nocpuid_cpus[ci->ci_cpu_type].cpu_vendor;
2002 vendorname = i386_nocpuid_cpus[ci->ci_cpu_type].cpu_vendorname;
2003 class = i386_nocpuid_cpus[ci->ci_cpu_type].cpu_class;
2004 ci->ci_info = i386_nocpuid_cpus[ci->ci_cpu_type].cpu_info;
2008 modif = (ci->ci_signature >> 12) & 0x3;
2009 family = ci->ci_family;
2016 if (!strncmp((char *)ci->ci_vendor,
2025 if (ci->ci_vendor[0] != '\0')
2026 vendorname = (char *)&ci->ci_vendor[0];
2032 ci->ci_info = NULL;
2038 name = cpufam->cpu_models[ci->ci_model];
2042 ci->ci_info = cpufam->cpu_info;
2045 if (ci->ci_family == 6 && ci->ci_model >= 5) {
2047 tmp = intel_family6_name(ci);
2051 if (ci->ci_family == 15 &&
2052 ci->ci_brand_id <
2054 i386_intel_brand[ci->ci_brand_id])
2056 i386_intel_brand[ci->ci_brand_id];
2060 if (ci->ci_family == 6 && ci->ci_model >= 6) {
2061 if (ci->ci_brand_id == 1)
2068 amd_brand[ci->ci_brand_id];
2072 if (CPUID_TO_BASEFAMILY(ci->ci_signature)
2076 tmp = amd_amd64_name(ci);
2082 if (cpu_vendor == CPUVENDOR_IDT && ci->ci_family >= 6)
2087 ci->ci_cpu_class = class;
2089 sz = sizeof(ci->ci_tsc_freq);
2090 (void)sysctlbyname("machdep.tsc_freq", &ci->ci_tsc_freq, &sz, NULL, 0);
2111 if (ci->ci_tsc_freq != 0)
2113 ((uintmax_t)ci->ci_tsc_freq + 4999) / 1000000,
2114 (((uintmax_t)ci->ci_tsc_freq + 4999) / 10000) % 100);
2117 (void)cpu_tsc_freq_cpuid(ci);
2119 aprint_normal_dev(ci->ci_dev, "family %#x model %#x stepping %#x",
2120 ci->ci_family, ci->ci_model, CPUID_TO_STEPPING(ci->ci_signature));
2121 if (ci->ci_signature != 0)
2122 aprint_normal(" (id %#x)", ci->ci_signature);
2125 if (ci->ci_info)
2126 (*ci->ci_info)(ci);
2132 print_bits(cpuname, "features", CPUID_FLAGS1, ci->ci_feat_val[0]);
2133 print_bits(cpuname, "features1", CPUID2_FLAGS1, ci->ci_feat_val[1]);
2138 : CPUID_EXT_FLAGS, ci->ci_feat_val[2]);
2141 : CPUID_AMD_FLAGS4, ci->ci_feat_val[3]);
2144 ci->ci_feat_val[4]);
2147 ci->ci_feat_val[5]);
2150 ci->ci_feat_val[6]);
2154 ci->ci_feat_val[7]);
2156 print_bits(cpuname, "xsave features", XCR0_FLAGS1, ci->ci_feat_val[8]);
2158 ci->ci_feat_val[9]);
2160 if (ci->ci_max_xsave != 0) {
2162 cpuname, ci->ci_cur_xsave, ci->ci_max_xsave);
2164 ci->ci_feat_val[1] & CPUID2_OSXSAVE ? "en" : "dis");
2165 if (ci->ci_feat_val[1] & CPUID2_OSXSAVE)
2170 x86_print_cache_and_tlb_info(ci);
2172 if (ci->ci_max_cpuid >= 3 && (ci->ci_feat_val[0] & CPUID_PSN)) {
2175 ci->ci_cpu_serial[0] / 65536, ci->ci_cpu_serial[0] % 65536,
2176 ci->ci_cpu_serial[1] / 65536, ci->ci_cpu_serial[1] % 65536,
2177 ci->ci_cpu_serial[2] / 65536, ci->ci_cpu_serial[2] % 65536);
2180 if (ci->ci_cpu_class == CPUCLASS_386)
2183 if (ci->ci_cpu_type == CPU_486DLC) {
2198 if (ci->ci_max_cpuid < 0)
2201 identifycpu_cpuids(ci);
2203 if ((ci->ci_max_cpuid >= 5)
2226 if ((ci->ci_max_cpuid >= 6)
2233 if ((ci->ci_max_cpuid >= 7)
2259 if (ci->ci_max_ext_cpuid >= 0x80000007)
2260 powernow_probe(ci);
2262 if (ci->ci_max_ext_cpuid >= 0x80000008) {
2270 if (ci->ci_max_ext_cpuid >= 0x80000021) {
2276 if (ci->ci_max_ext_cpuid >= 0x80000007) {
2281 if ((ci->ci_max_ext_cpuid >= 0x8000000a)
2282 && (ci->ci_feat_val[3] & CPUID_SVM) != 0) {
2291 if (ci->ci_max_ext_cpuid >= 0x8000001b) {
2296 if (ci->ci_max_ext_cpuid >= 0x8000001f) {
2301 if (ci->ci_max_ext_cpuid >= 0x80000022) {
2318 if (ci->ci_max_ext_cpuid >= 0x80000027) {
2327 if (ci->ci_max_cpuid >= 0x0a) {
2371 if (ci->ci_max_cpuid >= 0x1a) {
2421 print_cache_config(struct cpu_info *ci, int cache_tag, const char *name,
2424 struct x86_cache_info *cai = &ci->ci_cinfo[cache_tag];
2431 aprint_verbose_dev(ci->ci_dev, "");
2462 print_tlb_config(struct cpu_info *ci, int cache_tag, const char *name,
2465 struct x86_cache_info *cai = &ci->ci_cinfo[cache_tag];
2472 aprint_verbose_dev(ci->ci_dev, "");
2504 x86_print_cache_and_tlb_info(struct cpu_info *ci)
2508 if (ci->ci_cinfo[CAI_ICACHE].cai_totalsize != 0 ||
2509 ci->ci_cinfo[CAI_DCACHE].cai_totalsize != 0) {
2510 sep = print_cache_config(ci, CAI_ICACHE, "I-cache:", NULL);
2511 sep = print_cache_config(ci, CAI_DCACHE, "D-cache:", sep);
2515 if (ci->ci_cinfo[CAI_L2CACHE].cai_totalsize != 0) {
2516 sep = print_cache_config(ci, CAI_L2CACHE, "L2 cache:", NULL);
2520 if (ci->ci_cinfo[CAI_L3CACHE].cai_totalsize != 0) {
2521 sep = print_cache_config(ci, CAI_L3CACHE, "L3 cache:", NULL);
2525 if (ci->ci_cinfo[CAI_PREFETCH].cai_linesize != 0) {
2526 aprint_verbose_dev(ci->ci_dev, "%dB prefetching",
2527 ci->ci_cinfo[CAI_PREFETCH].cai_linesize);
2532 sep = print_tlb_config(ci, CAI_ITLB, "ITLB:", NULL);
2533 sep = print_tlb_config(ci, CAI_ITLB2, "ITLB:", sep);
2534 sep = print_tlb_config(ci, CAI_L1_1GBITLB, "ITLB:", sep);
2538 sep = print_tlb_config(ci, CAI_DTLB, "DTLB:", NULL);
2539 sep = print_tlb_config(ci, CAI_DTLB2, "DTLB:", sep);
2540 sep = print_tlb_config(ci, CAI_L1_1GBDTLB, "DTLB:", sep);
2544 sep = print_tlb_config(ci, CAI_L1_LD_TLB, "Load only TLB:", NULL);
2548 sep = print_tlb_config(ci, CAI_L1_ST_TLB, "Store only TLB:", NULL);
2552 sep = print_tlb_config(ci, CAI_L2_ITLB, "L2 ITLB:", NULL);
2553 sep = print_tlb_config(ci, CAI_L2_ITLB2, "L2 ITLB:", sep);
2554 sep = print_tlb_config(ci, CAI_L2_1GBITLB, "L2 ITLB:", sep);
2558 sep = print_tlb_config(ci, CAI_L2_DTLB, "L2 DTLB:", NULL);
2559 sep = print_tlb_config(ci, CAI_L2_DTLB2, "L2 DTLB:", sep);
2560 sep = print_tlb_config(ci, CAI_L2_1GBDTLB, "L2 DTLB:", sep);
2564 sep = print_tlb_config(ci, CAI_L2_STLB, "L2 STLB:", NULL);
2565 sep = print_tlb_config(ci, CAI_L2_STLB2, "L2 STLB:", sep);
2566 sep = print_tlb_config(ci, CAI_L2_STLB3, "L2 STLB:", sep);
2572 powernow_probe(struct cpu_info *ci)
2580 aprint_normal_dev(ci->ci_dev, "Power Management features: %s\n", buf);
2593 struct cpu_info ci;
2597 cpu_probe_base_features(&ci, "unknown");
2599 if (!strcmp((char *)ci.ci_vendor, "AuthenticAMD"))
2601 else if (!strcmp((char *)ci.ci_vendor, "GenuineIntel"))