Lines Matching refs:pm
68 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
69 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
76 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
81 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
82 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
84 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
86 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
89 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
91 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
92 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
93 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
94 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
97 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
104 switch (rdev->pm.profile) { in radeon_pm_update_profile()
106 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
110 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
111 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
113 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
115 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
116 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
118 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
122 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
123 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
125 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
128 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
129 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
131 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
134 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
135 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
137 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
141 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
142 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
143 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
144 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
145 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
147 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
148 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
149 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
150 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
169 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
174 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
178 rdev->pm.vblank_sync); in radeon_sync_with_vblank()
181 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
183 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
194 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
195 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
199 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
200 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
201 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
202 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
208 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
210 rdev->pm.active_crtc_count && in radeon_set_power_state()
211 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
212 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
213 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
214 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
216 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
217 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
219 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
220 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
223 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
228 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
240 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
244 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
249 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
253 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
263 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
264 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
275 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
276 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
279 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
292 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
302 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
305 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
319 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
320 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
329 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
332 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
335 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
344 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
345 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
346 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
349 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
379 int cp = rdev->pm.profile; in radeon_get_pm_profile()
401 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
402 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
404 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
406 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
408 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
410 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
412 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
423 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
434 int pm = rdev->pm.pm_method; in radeon_get_pm_method() local
437 (pm == PM_METHOD_DYNPM) ? "dynpm" : in radeon_get_pm_method()
438 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
457 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
463 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
464 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
465 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
466 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
467 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
469 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
471 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
472 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
473 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
474 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
475 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
491 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state() local
494 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : in radeon_get_dpm_state()
495 (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); in radeon_get_dpm_state()
506 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
508 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
510 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
512 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
514 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
518 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
535 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
561 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
573 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
582 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
703 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
720 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
722 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
755 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
765 if (rdev->pm.no_fan && in hwmon_attributes_visible()
811 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
820 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
822 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
825 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
826 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
842 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
843 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
851 pm.dpm.thermal.work); in radeon_dpm_thermal_work_handler()
855 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
858 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
861 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
863 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
865 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
867 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
869 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
871 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
873 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
874 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
875 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
882 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
919 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
920 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
953 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
954 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
974 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
1003 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1004 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1036 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1039 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1041 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1042 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1043 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1045 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1049 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1054 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1056 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1059 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1065 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1070 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1071 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1079 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1080 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1083 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1084 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1089 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1090 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1100 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1102 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1105 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1109 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1131 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1135 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1136 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1137 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1140 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1141 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1145 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1148 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1154 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1162 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1165 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1166 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1169 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1172 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1173 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1176 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1178 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1180 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1182 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1187 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1188 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1190 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1191 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1192 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1202 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1203 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1205 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1206 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1208 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1209 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1210 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1218 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1219 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1220 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1221 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1223 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1225 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1230 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1234 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1235 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1236 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1241 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1253 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1254 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1256 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1257 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1259 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1260 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1261 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1262 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1265 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1266 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1267 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1268 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1269 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1270 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1271 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1272 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1274 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1275 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1276 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1277 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1280 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1289 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1290 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1293 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1296 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1304 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1305 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1307 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1308 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1310 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1311 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1312 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1313 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1319 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1329 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1330 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1331 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1332 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1333 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1334 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1335 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1336 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1337 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1338 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1351 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1352 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1354 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1355 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1357 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1358 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1359 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1360 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1369 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1372 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1388 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1390 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1399 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1400 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1401 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1402 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1403 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1404 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1405 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1406 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1418 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1419 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1421 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1426 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1429 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1440 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1444 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1445 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1447 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1448 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1450 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1451 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1452 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1453 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1504 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1508 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1510 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1512 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1542 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1546 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1548 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1550 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1552 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1556 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1560 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1570 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1571 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1573 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1587 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1591 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1593 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1595 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1605 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1606 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1616 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1625 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1626 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1627 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1628 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1631 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1633 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1634 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1637 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1639 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1648 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1653 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1654 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1656 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1669 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1674 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1686 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1689 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1691 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1692 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1698 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1699 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1704 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1707 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1708 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1709 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1710 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1711 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1713 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1714 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1720 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1723 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1724 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1725 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1729 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1731 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1732 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1733 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1738 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1739 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1741 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1742 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1750 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1759 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1762 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1765 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1766 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1772 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1773 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1780 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1782 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1786 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1792 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1807 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1838 pm.dynpm_idle_work.work); in radeon_dynpm_idle_work_handler()
1841 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1842 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1857 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1858 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1859 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1860 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1861 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1863 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1867 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1868 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1869 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1870 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1871 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1873 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1881 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1882 jiffies > rdev->pm.dynpm_action_timeout) { in radeon_dynpm_idle_work_handler()
1887 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1890 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1909 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info()
1910 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1915 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1917 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1920 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1923 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1924 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info()
1926 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info()
1927 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1928 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info()