Lines Matching defs:psc
240 struct virtio_pci_softc * const psc = device_private(self);
241 struct virtio_softc * const sc = &psc->sc_sc;
275 psc->sc_pa = *pa;
276 psc->sc_iot = pa->pa_iot;
319 psc->sc_devcfg_offset = VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI;
320 if (virtio_pci_adjust_config_region(psc))
338 struct virtio_pci_softc * const psc = device_private(self);
339 struct virtio_softc * const sc = &psc->sc_sc;
359 struct virtio_pci_softc * const psc = device_private(self);
360 struct virtio_softc * const sc = &psc->sc_sc;
371 KASSERT(psc->sc_ihs_num == 0);
374 for (i = 0; i < __arraycount(psc->sc_bars_iot); i++) {
375 if (psc->sc_bars_iosize[i] == 0)
377 bus_space_unmap(psc->sc_bars_iot[i],
378 psc->sc_bars_ioh[i], psc->sc_bars_iosize[i]);
379 psc->sc_bars_iosize[i] = 0;
382 if (psc->sc_iosize) {
383 bus_space_unmap(psc->sc_iot, psc->sc_ioh,
384 psc->sc_iosize);
385 psc->sc_iosize = 0;
395 struct virtio_pci_softc * const psc = device_private(self);
397 struct virtio_softc * const sc = &psc->sc_sc;
401 &psc->sc_iot, &psc->sc_ioh, NULL, &psc->sc_iosize)) {
407 if (bus_space_subregion(psc->sc_iot, psc->sc_ioh,
408 VIRTIO_CONFIG_QUEUE_NOTIFY, 2, &psc->sc_notify_ioh)) {
412 psc->sc_notify_iosize = 2;
413 psc->sc_notify_iot = psc->sc_iot;
416 if (bus_space_subregion(psc->sc_iot, psc->sc_ioh,
417 VIRTIO_CONFIG_ISR_STATUS, 1, &psc->sc_isr_ioh)) {
421 psc->sc_isr_iosize = 1;
422 psc->sc_isr_iot = psc->sc_iot;
434 struct virtio_pci_softc * const psc = device_private(self);
436 struct virtio_softc * const sc = &psc->sc_sc;
449 if (virtio_pci_find_cap(psc, VIRTIO_PCI_CAP_COMMON_CFG,
452 if (virtio_pci_find_cap(psc, VIRTIO_PCI_CAP_NOTIFY_CFG,
455 if (virtio_pci_find_cap(psc, VIRTIO_PCI_CAP_ISR_CFG,
458 if (virtio_pci_find_cap(psc, VIRTIO_PCI_CAP_DEVICE_CFG,
484 &psc->sc_bars_iot[j], &psc->sc_bars_ioh[j],
485 NULL, &psc->sc_bars_iosize[j])) {
492 j, psc->sc_bars_iot[j], psc->sc_bars_iosize[j]);
498 if (bus_space_subregion(psc->sc_bars_iot[i], psc->sc_bars_ioh[i],
499 notify.cap.offset, notify.cap.length, &psc->sc_notify_ioh)) {
504 psc->sc_notify_iosize = notify.cap.length;
505 psc->sc_notify_iot = psc->sc_bars_iot[i];
506 psc->sc_notify_off_multiplier = le32toh(notify.notify_off_multiplier);
510 if (bus_space_subregion(psc->sc_bars_iot[i],
511 psc->sc_bars_ioh[i], device.offset, device.length,
521 sc->sc_devcfg_iot = psc->sc_bars_iot[i];
525 if (bus_space_subregion(psc->sc_bars_iot[i], psc->sc_bars_ioh[i],
526 isr.offset, isr.length, &psc->sc_isr_ioh)) {
531 psc->sc_isr_iosize = isr.length;
532 psc->sc_isr_iot = psc->sc_bars_iot[i];
535 if (bus_space_subregion(psc->sc_bars_iot[i], psc->sc_bars_ioh[i],
536 common.offset, common.length, &psc->sc_ioh)) {
541 psc->sc_iosize = common.length;
542 psc->sc_iot = psc->sc_bars_iot[i];
544 psc->sc_sc.sc_version_1 = 1;
555 if (psc->sc_bars_iosize[i] == 0)
557 bus_space_unmap(psc->sc_bars_iot[i], psc->sc_bars_ioh[i],
558 psc->sc_bars_iosize[i]);
559 psc->sc_bars_iosize[i] = 0;
566 virtio_pci_find_cap(struct virtio_pci_softc *psc, int cfg_type, void *buf,
569 device_t self = psc->sc_sc.sc_dev;
570 pci_chipset_tag_t pc = psc->sc_pa.pa_pc;
571 pcitag_t tag = psc->sc_pa.pa_tag;
621 struct virtio_pci_softc * const psc = container_of(sc,
624 bus_space_write_2(psc->sc_notify_iot, psc->sc_notify_ioh, 0, idx);
629 virtio_pci_adjust_config_region(struct virtio_pci_softc *psc)
631 struct virtio_softc * const sc = &psc->sc_sc;
634 if (psc->sc_sc.sc_version_1)
637 sc->sc_devcfg_iosize = psc->sc_iosize - psc->sc_devcfg_offset;
638 sc->sc_devcfg_iot = psc->sc_iot;
639 if (bus_space_subregion(psc->sc_iot, psc->sc_ioh,
640 psc->sc_devcfg_offset, sc->sc_devcfg_iosize,
652 struct virtio_pci_softc * const psc = container_of(sc,
655 bus_space_write_2(psc->sc_iot, psc->sc_ioh,
657 return bus_space_read_2(psc->sc_iot, psc->sc_ioh,
664 struct virtio_pci_softc * const psc = container_of(sc,
667 bus_space_write_2(psc->sc_iot, psc->sc_ioh,
669 bus_space_write_4(psc->sc_iot, psc->sc_ioh,
672 if (psc->sc_ihs_num > 1) {
674 if (psc->sc_intr_pervq)
676 bus_space_write_2(psc->sc_iot, psc->sc_ioh,
684 struct virtio_pci_softc * const psc = container_of(sc,
689 old = bus_space_read_1(psc->sc_iot, psc->sc_ioh,
692 bus_space_write_1(psc->sc_iot, psc->sc_ioh,
700 struct virtio_pci_softc * const psc = container_of(sc,
704 r = bus_space_read_4(psc->sc_iot, psc->sc_ioh,
709 bus_space_write_4(psc->sc_iot, psc->sc_ioh,
722 struct virtio_pci_softc * const psc = container_of(sc,
725 psc->sc_notify_off_multiplier;
727 bus_space_write_2(psc->sc_notify_iot, psc->sc_notify_ioh, offset, idx);
733 struct virtio_pci_softc * const psc = container_of(sc,
735 bus_space_tag_t iot = psc->sc_iot;
736 bus_space_handle_t ioh = psc->sc_ioh;
765 struct virtio_pci_softc * const psc = container_of(sc,
768 bus_space_tag_t iot = psc->sc_iot;
769 bus_space_handle_t ioh = psc->sc_ioh;
794 if (psc->sc_ihs_num > 1) {
796 if (psc->sc_intr_pervq)
806 struct virtio_pci_softc * const psc = container_of(sc,
808 bus_space_tag_t iot = psc->sc_iot;
809 bus_space_handle_t ioh = psc->sc_ioh;
822 struct virtio_pci_softc * const psc = container_of(sc,
825 bus_space_tag_t iot = psc->sc_iot;
826 bus_space_handle_t ioh = psc->sc_ioh;
881 struct virtio_pci_softc * const psc = container_of(sc,
883 bus_space_tag_t iot = psc->sc_iot;
884 bus_space_handle_t ioh = psc->sc_ioh;
887 if (!virtio_pci_msix_enabled(psc))
901 if (psc->sc_intr_pervq)
921 struct virtio_pci_softc * const psc = container_of(sc,
925 if (!virtio_pci_msix_enabled(psc))
931 bus_space_write_2(psc->sc_iot, psc->sc_ioh, offset, vector);
932 ret = bus_space_read_2(psc->sc_iot, psc->sc_ioh, offset);
943 bus_space_write_2(psc->sc_iot, psc->sc_ioh, offset, qid);
948 if (psc->sc_intr_pervq)
951 bus_space_write_2(psc->sc_iot, psc->sc_ioh, offset, vector);
952 ret = bus_space_read_2(psc->sc_iot, psc->sc_ioh, offset);
970 struct virtio_pci_softc * const psc = container_of(sc,
982 pci_intr_setattr(pc, &psc->sc_ihp[idx], PCI_INTR_MPSAFE, true);
987 psc->sc_ihs[idx] = pci_intr_establish_xname(pc, psc->sc_ihp[idx],
989 if (psc->sc_ihs[idx] == NULL) {
996 if (psc->sc_intr_pervq) {
1005 pci_intr_setattr(pc, &psc->sc_ihp[n],
1009 psc->sc_ihs[n] = pci_intr_establish_xname(pc,
1010 psc->sc_ihp[n], sc->sc_ipl,
1012 if (psc->sc_ihs[n] == NULL) {
1020 pci_intr_setattr(pc, &psc->sc_ihp[idx],
1026 psc->sc_ihs[idx] = pci_intr_establish_xname(pc,
1027 psc->sc_ihp[idx], sc->sc_ipl,
1029 if (psc->sc_ihs[idx] == NULL) {
1037 intrstr = pci_intr_string(pc, psc->sc_ihp[idx], intrbuf,
1041 if (psc->sc_intr_pervq) {
1051 intrstr = pci_intr_string(pc, psc->sc_ihp[n],
1056 r = interrupt_distribute(psc->sc_ihs[n], affinity,
1072 intrstr = pci_intr_string(pc, psc->sc_ihp[idx], intrbuf,
1082 if (psc->sc_ihs[idx] != NULL)
1083 pci_intr_disestablish(psc->sc_pa.pa_pc, psc->sc_ihs[idx]);
1085 if (psc->sc_intr_pervq) {
1088 if (psc->sc_ihs[n] == NULL)
1090 pci_intr_disestablish(psc->sc_pa.pa_pc,
1091 psc->sc_ihs[n]);
1095 if (psc->sc_ihs[idx] != NULL) {
1096 pci_intr_disestablish(psc->sc_pa.pa_pc,
1097 psc->sc_ihs[idx]);
1108 struct virtio_pci_softc * const psc = container_of(sc,
1116 pci_intr_setattr(pc, &psc->sc_ihp[0], PCI_INTR_MPSAFE, true);
1118 psc->sc_ihs[0] = pci_intr_establish_xname(pc, psc->sc_ihp[0],
1120 if (psc->sc_ihs[0] == NULL) {
1125 intrstr = pci_intr_string(pc, psc->sc_ihp[0], intrbuf,
1135 struct virtio_pci_softc * const psc = container_of(sc,
1138 pci_chipset_tag_t pc = psc->sc_pa.pa_pc;
1139 pcitag_t tag = psc->sc_pa.pa_tag;
1147 nmsix = pci_msix_count(psc->sc_pa.pa_pc, psc->sc_pa.pa_tag);
1171 error = pci_intr_alloc(&psc->sc_pa, &psc->sc_ihp, counts, max_type);
1177 if (pci_intr_type(pc, psc->sc_ihp[0]) == PCI_INTR_TYPE_MSIX) {
1178 psc->sc_intr_pervq = nmsix > 2 ? true : false;
1179 psc->sc_ihs = kmem_zalloc(sizeof(*psc->sc_ihs) * nmsix,
1182 error = virtio_pci_establish_msix_interrupts(sc, &psc->sc_pa);
1184 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * nmsix);
1185 pci_intr_release(pc, psc->sc_ihp, nmsix);
1193 psc->sc_ihs_num = nmsix;
1194 psc->sc_devcfg_offset = VIRTIO_CONFIG_DEVICE_CONFIG_MSI;
1195 virtio_pci_adjust_config_region(psc);
1196 } else if (pci_intr_type(pc, psc->sc_ihp[0]) == PCI_INTR_TYPE_INTX) {
1197 psc->sc_intr_pervq = false;
1198 psc->sc_ihs = kmem_zalloc(sizeof(*psc->sc_ihs) * 1,
1201 error = virtio_pci_establish_intx_interrupt(sc, &psc->sc_pa);
1203 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * 1);
1204 pci_intr_release(pc, psc->sc_ihp, 1);
1208 psc->sc_ihs_num = 1;
1209 psc->sc_devcfg_offset = VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI;
1210 virtio_pci_adjust_config_region(psc);
1220 if (!psc->sc_intr_pervq)
1228 struct virtio_pci_softc * const psc = container_of(sc,
1231 for (int i = 0; i < psc->sc_ihs_num; i++) {
1232 if (psc->sc_ihs[i] == NULL)
1234 pci_intr_disestablish(psc->sc_pa.pa_pc, psc->sc_ihs[i]);
1235 psc->sc_ihs[i] = NULL;
1238 if (psc->sc_ihs_num > 0) {
1239 pci_intr_release(psc->sc_pa.pa_pc, psc->sc_ihp,
1240 psc->sc_ihs_num);
1243 if (psc->sc_ihs != NULL) {
1244 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * psc->sc_ihs_num);
1245 psc->sc_ihs = NULL;
1247 psc->sc_ihs_num = 0;
1251 virtio_pci_msix_enabled(struct virtio_pci_softc *psc)
1253 pci_chipset_tag_t pc = psc->sc_pa.pa_pc;
1255 if (pci_intr_type(pc, psc->sc_ihp[0]) == PCI_INTR_TYPE_MSIX)
1268 struct virtio_pci_softc * const psc = container_of(sc,
1273 isr = bus_space_read_1(psc->sc_isr_iot, psc->sc_isr_ioh, 0);