Lines Matching defs:mly_param_controller
188 struct mly_param_controller { struct
189 u_int8_t rdahen:1; /* N/A */
190 u_int8_t bilodly:1; /* N/A */
191 u_int8_t fua_disable:1;
192 u_int8_t reass1s:1; /* N/A */
193 u_int8_t truvrfy:1; /* N/A */
194 u_int8_t dwtvrfy:1; /* N/A */
195 u_int8_t background_initialisation:1;
196 u_int8_t clustering:1; /* N/A */
198 u_int8_t bios_disable:1;
199 u_int8_t boot_from_cdrom:1;
200 u_int8_t drive_coercion:1;
201 u_int8_t write_same_disable:1;
202 u_int8_t hba_mode:1; /* N/A */
203 u_int8_t bios_geometry:2;
206 u_int8_t res1:1; /* N/A */
208 u_int8_t res2[2]; /* N/A */
210 u_int8_t v_dec:1;
211 u_int8_t safte:1; /* N/A */
212 u_int8_t ses:1; /* N/A */
213 u_int8_t res3:2; /* N/A */
214 u_int8_t v_arm:1;
215 u_int8_t v_ofm:1;
216 u_int8_t res4:1; /* N/A */
218 u_int8_t rebuild_check_rate;
219 u_int8_t cache_line_size; /* see 8.4 */
220 u_int8_t oem_code;
227 u_int8_t spinup_mode;
231 u_int8_t spinup_devices;
232 u_int8_t spinup_interval;
233 u_int8_t spinup_wait_time;
235 u_int8_t res5:3; /* N/A */
236 u_int8_t vutursns:1; /* N/A */
237 u_int8_t dccfil:1; /* N/A */
238 u_int8_t nopause:1; /* N/A */
239 u_int8_t disqfull:1; /* N/A */
240 u_int8_t disbusy:1; /* N/A */
242 u_int8_t res6:2; /* N/A */
243 u_int8_t failover_node_name; /* N/A */
244 u_int8_t res7:1; /* N/A */
245 u_int8_t ftopo:3; /* N/A */
246 u_int8_t disable_ups:1; /* N/A */
248 u_int8_t res8:1; /* N/A */
249 u_int8_t propagate_reset:1; /* N/A */
250 u_int8_t nonstd_mp_reset:1; /* N/A */
251 u_int8_t res9:5; /* N/A */
253 u_int8_t res10; /* N/A */
254 u_int8_t serial_port_baud_rate; /* N/A */
255 u_int8_t serial_port_control; /* N/A */
256 u_int8_t change_stripe_ok_developer_flag_only; /* N/A */
258 u_int8_t small_large_host_transfers:2; /* N/A */
259 u_int8_t frame_control:2; /* N/A */
260 u_int8_t pci_latency_control:2; /* N/A */
261 u_int8_t treat_lip_as_reset:1; /* N/A */
262 u_int8_t res11:1; /* N/A */
264 u_int8_t ms_autorest:1; /* N/A */
265 u_int8_t res12:7; /* N/A */
267 u_int8_t ms_aa_fsim:1; /* N/A */
268 u_int8_t ms_aa_ccach:1; /* N/A */
269 u_int8_t ms_aa_fault_signals:1; /* N/A */
270 u_int8_t ms_aa_c4_faults:1; /* N/A */
271 u_int8_t ms_aa_host_reset_delay_mask:4; /* N/A */
273 u_int8_t ms_flg_simplex_no_rstcom:1; /* N/A */
274 u_int8_t res13:7; /* N/A */
276 u_int8_t res14; /* N/A */
277 u_int8_t hardloopid[2][2]; /* N/A */
278 u_int8_t ctrlname[2][16+1]; /* N/A */
279 u_int8_t initiator_id;
280 u_int8_t startup_option;
288 u_int8_t res15[62];