Lines Matching defs:sc_ctrl

696 	uint32_t sc_ctrl;		/* prototype CTRL register */
2939 sc->sc_ctrl |= CTRL_ILOS;
2950 sc->sc_ctrl |=
2953 sc->sc_ctrl |=
2957 sc->sc_ctrl |=
2968 sc->sc_ctrl |= CTRL_ILOS;
2990 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
4614 sc->sc_ctrl |= CTRL_VME;
4616 sc->sc_ctrl &= ~CTRL_VME;
4619 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
5167 sc->sc_ctrl &= ~__BIT(29); /* Clear bit 29 */
5168 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
5585 sc->sc_ctrl |= CTRL_GIO_M_DIS;
5586 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
5894 /* Reload sc_ctrl */
5895 sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
7403 sc->sc_ctrl |= CTRL_EXTLINK_EN;
7404 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
7569 sc->sc_ctrl |= CTRL_MEHE;
7570 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
10511 sc->sc_ctrl &= ~(CTRL_SPEED_MASK | CTRL_FD);
10514 sc->sc_ctrl |= CTRL_SPEED_10;
10517 sc->sc_ctrl |= CTRL_SPEED_100;
10520 sc->sc_ctrl |= CTRL_SPEED_1000;
10532 sc->sc_ctrl |= CTRL_FD;
10533 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
10736 * so we should update sc->sc_ctrl
10739 sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
10748 if (sc->sc_ctrl & CTRL_TFCE)
11256 sc->sc_ctrl |= CTRL_SWDPIN(0);
11258 sc->sc_ctrl &= ~CTRL_SWDPIN(0);
11261 sc->sc_ctrl ^= (sc->sc_type >= WM_T_82540) ? CTRL_SWDPIN(0) : 0;
11263 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
11301 sc->sc_ctrl |= CTRL_FRCSPD | CTRL_FRCFDX;
11302 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
11346 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_PHY_RESET);
11349 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
11371 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_PHY_RESET);
11374 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
11782 sc->sc_ctrl |= CTRL_SLU;
11783 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
11935 sc->sc_ctrl &= ~(CTRL_SPEED_MASK | CTRL_FD);
11936 sc->sc_ctrl |= CTRL_SLU;
11939 sc->sc_ctrl &= ~(CTRL_FRCSPD | CTRL_FRCFDX);
11941 sc->sc_ctrl &= ~CTRL_ASDE;
11942 sc->sc_ctrl |= CTRL_FRCSPD | CTRL_FRCFDX;
11944 sc->sc_ctrl |= CTRL_FD;
11947 sc->sc_ctrl |= CTRL_SPEED_10;
11950 sc->sc_ctrl |= CTRL_SPEED_100;
11953 sc->sc_ctrl |= CTRL_SPEED_1000;
11963 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13045 sc->sc_ctrl &= ~(CTRL_TFCE | CTRL_RFCE);
13058 sc->sc_ctrl |= CTRL_TFCE;
13062 sc->sc_ctrl |= CTRL_RFCE;
13075 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13461 sc->sc_ctrl |= CTRL_SWDPIO(0);
13465 sc->sc_ctrl &= ~CTRL_SWDPIO(1);
13468 sc->sc_ctrl &= ~CTRL_LRST;
13470 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13556 sc->sc_ctrl &= ~CTRL_LRST;
13571 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13607 * so we should update sc->sc_ctrl
13609 sc->sc_ctrl = CSR_READ(sc, WMREG_CTRL);
13737 * so we should update sc->sc_ctrl
13739 sc->sc_ctrl = ctrl | CTRL_SLU | CTRL_FD;
13740 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13811 sc->sc_ctrl |= CTRL_LRST;
13812 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13815 sc->sc_ctrl &= ~CTRL_LRST;
13816 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
13876 sc->sc_ctrl |= CTRL_SLU;
13879 sc->sc_ctrl |= CTRL_SWDPIN(0) | CTRL_SWDPIN(1);
13903 sc->sc_ctrl |= CTRL_SPEED_1000 | CTRL_FRCSPD | CTRL_FD
13909 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl);
16617 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_PHY_RESET);
16821 CSR_WRITE(sc, WMREG_CTRL, sc->sc_ctrl | CTRL_SWDPIN(2)