Lines Matching defs:nexttx

5406 	int nexttx;
5436 	nexttx = txq->txq_next;
5437 	txd = &txq->txq_descs[nexttx];
8942 	int error, nexttx, lasttx = -1, ofree, seg, segs_needed, use_tso;
9155 		for (nexttx = txq->txq_next, seg = 0;
9161 			     nexttx = WM_NEXTTX(txq, nexttx)) {
9175 				    &txq->txq_descs[nexttx].wtx_addr, curaddr);
9176 				txq->txq_descs[nexttx].wtx_cmdlen
9178 				txq->txq_descs[nexttx].wtx_fields.wtxu_status
9180 				txq->txq_descs[nexttx].wtx_fields.wtxu_options
9182 				txq->txq_descs[nexttx].wtx_fields.wtxu_vlan =0;
9183 				lasttx = nexttx;
9188 					device_xname(sc->sc_dev), nexttx,
9228 		CSR_WRITE(sc, txq->txq_tdt_reg, nexttx);
9231 		    ("%s: TX: TDT -> %d\n", device_xname(sc->sc_dev), nexttx));
9239 		txq->txq_next = nexttx;
9560 	int error, nexttx, lasttx = -1, seg, segs_needed;
9731 		nexttx = txq->txq_next;
9734 			wm_set_dma_addr(&txq->txq_descs[nexttx].wtx_addr,
9736 			txq->txq_descs[nexttx].wtx_cmdlen =
9738 			txq->txq_descs[nexttx].wtx_fields.wtxu_status = 0;
9739 			txq->txq_descs[nexttx].wtx_fields.wtxu_options = 0;
9741 				txq->txq_descs[nexttx].wtx_cmdlen |=
9743 				txq->txq_descs[nexttx].wtx_fields.wtxu_vlan =
9746 				txq->txq_descs[nexttx].wtx_fields.wtxu_vlan =0;
9751 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_addr =
9754 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_cmdlen =
9756 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_fields =
9760 				device_xname(sc->sc_dev), nexttx,
9768 		lasttx = nexttx;
9769 		nexttx = WM_NEXTTX(txq, nexttx);
9775 		     seg++, nexttx = WM_NEXTTX(txq, nexttx)) {
9776 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_addr =
9778 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_cmdlen =
9781 			txq->txq_nq_descs[nexttx].nqtx_data.nqtxd_fields = 0;
9782 			lasttx = nexttx;
9786 				device_xname(sc->sc_dev), nexttx,
9814 		CSR_WRITE(sc, txq->txq_tdt_reg, nexttx);
9818 		    ("%s: TX: TDT -> %d\n", device_xname(sc->sc_dev), nexttx));
9826 		txq->txq_next = nexttx;