Lines Matching defs:qid
922 int qid;
939 for (qid = 0; qid < sc->ntxqs; qid++)
940 iwn_free_tx_ring(sc, &sc->txq[qid]);
1474 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1480 ring->qid = qid;
1498 if (qid > 4)
1553 sc->qfullmsk &= ~(1 << ring->qid);
2316 txq = &sc->txq[le16toh(ba->qid)];
2466 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2483 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2511 sc->qfullmsk &= ~(1 << ring->qid);
2531 if ((desc->qid & 0xf) != 4)
2571 DPRINTFN(4, ("notification qid=%d idx=%d flags=%x type=%d\n",
2572 desc->qid & 0xf, desc->idx, desc->flags, desc->type));
2574 if (!(desc->qid & 0x80)) /* Reply to a command. */
2733 int qid;
2739 for (qid = 0; qid < sc->ntxqs; qid++) {
2740 struct iwn_tx_ring *ring = &sc->txq[qid];
2741 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
2801 aprint_error(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
2802 i, ring->qid, ring->cur, ring->queued);
2921 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2924 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
2941 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2944 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2961 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
2963 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
3075 cmd->qid = ring->qid;
3227 DPRINTFN(4, ("sending data: qid=%d idx=%d len=%d nsegs=%d\n",
3228 ring->qid, ring->cur, m->m_pkthdr.len, data->map->dm_nsegs));
3256 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3261 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3265 sc->qfullmsk |= 1 << ring->qid;
3485 cmd->qid = ring->qid;
3511 ops->update_sched(sc, ring->qid, ring->cur, 0, 0);
3517 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5259 int qid = 7 + tid;
5262 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5266 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
5270 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
5273 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5274 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5277 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
5280 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5284 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5287 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5295 int qid = 7 + tid;
5298 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5302 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5303 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5306 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5309 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5318 int qid = 10 + tid;
5321 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5325 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
5329 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
5332 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5335 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5336 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5339 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5343 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5346 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5353 int qid = 10 + tid;
5356 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5360 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5363 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5364 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5367 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5370 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5499 int error, qid;
5517 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
5518 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
5519 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5523 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
5526 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5536 for (qid = 0; qid < 7; qid++) {
5538 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5539 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
5552 int error, qid;
5574 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
5575 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
5576 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5579 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
5582 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5592 for (qid = 0; qid < 7; qid++) {
5594 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5595 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
6292 int error, chnl, qid;
6343 for (qid = 0; qid < sc->ntxqs; qid++) {
6344 struct iwn_tx_ring *txq = &sc->txq[qid];
6347 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
6396 int chnl, qid, ntries;
6430 for (qid = 0; qid < sc->ntxqs; qid++)
6431 iwn_reset_tx_ring(sc, &sc->txq[qid]);