Lines Matching defs:dge_softc

246 struct dge_softc {  struct
247 	device_t sc_dev;		/* generic device information */
248 	bus_space_tag_t sc_st;		/* bus space tag */
249 	bus_space_handle_t sc_sh;	/* bus space handle */
250 	bus_dma_tag_t sc_dmat;		/* bus DMA tag */
251 	struct ethercom sc_ethercom;	/* ethernet common data */
253 	int sc_flags;			/* flags; see below */
254 	int sc_bus_speed;		/* PCI/PCIX bus speed */
255 	int sc_pcix_offset;		/* PCIX capability register offset */
257 	const struct dge_product *sc_dgep; /* Pointer to the dge_product entry */
258 	pci_chipset_tag_t sc_pc;
259 	pcitag_t sc_pt;
260 	int sc_mmrbc;			/* Max PCIX memory read byte count */
262 	void *sc_ih;			/* interrupt cookie */
264 	struct ifmedia sc_media;
266 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
269 	int		sc_align_tweak;
274 	struct dge_txsoft sc_txsoft[DGE_TXQUEUELEN];
275 	struct dge_rxsoft sc_rxsoft[DGE_NRXDESC];
280 	struct dge_control_data *sc_control_data;
286 	struct evcnt sc_ev_txsstall;	/* Tx stalled due to no txs */
287 	struct evcnt sc_ev_txdstall;	/* Tx stalled due to no txd */
288 	struct evcnt sc_ev_txforceintr; /* Tx interrupts forced */
289 	struct evcnt sc_ev_txdw;	/* Tx descriptor interrupts */
290 	struct evcnt sc_ev_txqe;	/* Tx queue empty interrupts */
291 	struct evcnt sc_ev_rxintr;	/* Rx interrupts */
292 	struct evcnt sc_ev_linkintr;	/* Link interrupts */
294 	struct evcnt sc_ev_rxipsum;	/* IP checksums checked in-bound */
295 	struct evcnt sc_ev_rxtusum;	/* TCP/UDP cksums checked in-bound */
296 	struct evcnt sc_ev_txipsum;	/* IP checksums comp. out-bound */
297 	struct evcnt sc_ev_txtusum;	/* TCP/UDP cksums comp. out-bound */
299 	struct evcnt sc_ev_txctx_init;	/* Tx cksum context cache initialized */
300 	struct evcnt sc_ev_txctx_hit;	/* Tx cksum context cache hit */
301 	struct evcnt sc_ev_txctx_miss;	/* Tx cksum context cache miss */
303 	struct evcnt sc_ev_txseg[DGE_NTXSEGS]; /* Tx packets w/ N segments */
304 	struct evcnt sc_ev_txdrop;	/* Tx packets dropped (too many segs) */
307 	int	sc_txfree;		/* number of free Tx descriptors */
308 	int	sc_txnext;		/* next ready Tx descriptor */
310 	int	sc_txsfree;		/* number of free Tx jobs */
311 	int	sc_txsnext;		/* next free Tx job */
312 	int	sc_txsdirty;		/* dirty Tx jobs */
314 	uint32_t sc_txctx_ipcs;		/* cached Tx IP cksum ctx */
315 	uint32_t sc_txctx_tucs;		/* cached Tx TCP/UDP cksum ctx */
317 	int	sc_rxptr;		/* next ready Rx descriptor/queue ent */
318 	int	sc_rxdiscard;
319 	int	sc_rxlen;
320 	struct mbuf *sc_rxhead;
321 	struct mbuf *sc_rxtail;
322 	struct mbuf **sc_rxtailp;
324 	uint32_t sc_ctrl0;		/* prototype CTRL0 register */
325 	uint32_t sc_icr;		/* prototype interrupt bits */
326 	uint32_t sc_tctl;		/* prototype TCTL register */
327 	uint32_t sc_rctl;		/* prototype RCTL register */
329 	int sc_mchash_type;		/* multicast filter offset */
331 	uint16_t sc_eeprom[EEPROM_SIZE];
333 	krndsource_t rnd_source; /* random source */
335 	void *sc_bugbuf;
337 	bus_dmamap_t sc_bugmap;
338 	struct rxbugentry *sc_entry;