Lines Matching defs:mc7
139 * @mc7: identifies MC7 to read from
147 int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
153 unsigned int size64 = mc7->size / 8; /* # of 64-bit words */
154 adapter_t *adap = mc7->adapter;
159 start *= (8 << mc7->width);
164 for (i = (1 << mc7->width) - 1; i >= 0; --i) {
168 t3_write_reg(adap, mc7->offset + A_MC7_BD_ADDR,
170 t3_write_reg(adap, mc7->offset + A_MC7_BD_OP, 0);
171 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP);
174 mc7->offset + A_MC7_BD_OP);
178 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1);
179 if (mc7->width == 0) {
181 mc7->offset + A_MC7_BD_DATA0);
184 if (mc7->width > 1)
185 val >>= shift[mc7->width];
186 val64 |= (u64)val << (step[mc7->width] * i);
1534 static void mc7_intr_handler(struct mc7 *mc7)
1536 adapter_t *adapter = mc7->adapter;
1537 u32 cause = t3_read_reg(adapter, mc7->offset + A_MC7_INT_CAUSE);
1540 mc7->stats.corr_err++;
1542 "data 0x%x 0x%x 0x%x\n", mc7->name,
1543 t3_read_reg(adapter, mc7->offset + A_MC7_CE_ADDR),
1544 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA0),
1545 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA1),
1546 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA2));
1550 mc7->stats.uncorr_err++;
1552 "data 0x%x 0x%x 0x%x\n", mc7->name,
1553 t3_read_reg(adapter, mc7->offset + A_MC7_UE_ADDR),
1554 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA0),
1555 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA1),
1556 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA2));
1560 mc7->stats.parity_err++;
1562 mc7->name, G_PE(cause));
1570 mc7->offset + A_MC7_ERR_ADDR);
1571 mc7->stats.addr_err++;
1573 mc7->name, addr);
1579 t3_write_reg(adapter, mc7->offset + A_MC7_INT_CAUSE, cause);
3254 static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
3269 adapter_t *adapter = mc7->adapter;
3272 if (!mc7->size)
3275 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
3280 t3_write_reg(adapter, mc7->offset + A_MC7_CFG, val | F_IFEN);
3281 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */
3285 t3_write_reg(adapter, mc7->offset + A_MC7_CAL, F_SGL_CAL_EN);
3286 (void) t3_read_reg(adapter, mc7->offset + A_MC7_CAL);
3288 if (t3_read_reg(adapter, mc7->offset + A_MC7_CAL) &
3291 mc7->name);
3296 t3_write_reg(adapter, mc7->offset + A_MC7_PARM,
3302 t3_write_reg(adapter, mc7->offset + A_MC7_CFG,
3304 (void) t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */
3307 t3_set_reg_field(adapter, mc7->offset + A_MC7_DLL, F_DLLENB,
3312 if (wrreg_wait(adapter, mc7->offset + A_MC7_PRE, 0) ||
3313 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE2, 0) ||
3314 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE3, 0) ||
3315 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
3319 t3_write_reg(adapter, mc7->offset + A_MC7_MODE, 0x100);
3320 t3_set_reg_field(adapter, mc7->offset + A_MC7_DLL,
3325 if (wrreg_wait(adapter, mc7->offset + A_MC7_PRE, 0) ||
3326 wrreg_wait(adapter, mc7->offset + A_MC7_REF, 0) ||
3327 wrreg_wait(adapter, mc7->offset + A_MC7_REF, 0) ||
3328 wrreg_wait(adapter, mc7->offset + A_MC7_MODE,
3330 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val | 0x380) ||
3331 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
3338 t3_write_reg(adapter, mc7->offset + A_MC7_REF,
3340 (void) t3_read_reg(adapter, mc7->offset + A_MC7_REF); /* flush */
3342 t3_write_reg(adapter, mc7->offset + A_MC7_ECC,
3344 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_DATA, 0);
3345 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_ADDR_BEG, 0);
3346 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_ADDR_END,
3347 (mc7->size << width) - 1);
3348 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_OP, V_OP(1));
3349 (void) t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP); /* flush */
3354 val = t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);
3357 CH_ERR(adapter, "%s MC7 BIST timed out\n", mc7->name);
3362 t3_set_reg_field(adapter, mc7->offset + A_MC7_CFG, 0, F_RDY);
3582 static void __devinit mc7_prep(adapter_t *adapter, struct mc7 *mc7,
3587 mc7->adapter = adapter;
3588 mc7->name = name;
3589 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR;
3590 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
3591 mc7->size = G_DEN(cfg) == M_DEN ? 0 : mc7_calc_size(cfg);
3592 mc7->width = G_WIDTH(cfg);