Lines Matching defs:onfi_parameter_page

113 struct onfi_parameter_page {  struct
115 	uint32_t param_signature; /* M: onfi signature ({'O','N','F','I'}) */
116 	uint16_t param_revision;  /* M: revision number */
117 	uint16_t param_features;  /* M: features supported */
118 	uint16_t param_optional_cmds; /* M: optional commands */
119 	uint16_t param_reserved_1;    /* R: reserved */
120 	uint16_t param_extended_len;  /* O: extended parameter page length */
121 	uint8_t param_num_param_pg;  /* O: number of parameter pages */
122 	uint8_t param_reserved_2[17]; /* R: reserved */
124 	uint8_t param_manufacturer[12]; /* M: device manufacturer (ASCII) */
125 	uint8_t param_model[20];	      /* M: device model (ASCII) */
126 	uint8_t param_manufacturer_id;  /* M: JEDEC ID of manufacturer */
127 	uint16_t param_date;	      /* O: date code (BCD) */
128 	uint8_t param_reserved_3[13];   /* R: reserved */
130 	uint32_t param_pagesize; /* M: number of data bytes per page */
131 	uint16_t param_sparesize; /* M: number of spare bytes per page */
132 	uint32_t param_part_pagesize; /* O: obsolete */
133 	uint16_t param_part_sparesize; /* O: obsolete */
134 	uint32_t param_blocksize;      /* M: number of pages per block */
135 	uint32_t param_lunsize;       /* M: number of blocks per LUN */
136 	uint8_t param_numluns;	      /* M: number of LUNs */
137 	uint8_t param_addr_cycles;   /* M: address cycles:
139 	uint8_t param_cellsize;   /* M: number of bits per cell */
140 	uint16_t param_lun_maxbad; /* M: maximum badblocks per LUN */
141 	uint16_t param_block_endurance; /* M: block endurance */
142 	uint8_t param_guaranteed_blocks; /* M: guaranteed valid blocks at
144 	uint16_t param_guaranteed_endurance; /* M: block endurance of
146 	uint8_t param_programs_per_page; /* M: number of programs per page */
147 	uint8_t param_partial_programming_attr; /* O: obsolete */
148 	uint8_t param_ecc_correctable_bits;     /* M: number of bits
150 	uint8_t param_interleaved_addr_bits; /* M: num of interleaved address
152 	uint8_t param_interleaved_op_attrs; /* O: obsolete */
153 	uint8_t param_reserved_4[13];	  /* R: reserved */
155 	uint8_t param_io_c_max; /* M: I/O pin capacitance, maximum */
156 	uint16_t param_async_timing_mode; /* M: async timing mode support */
157 	uint16_t param_async_progcache_timing_mode; /* O: obsolete */
158 	uint16_t param_t_prog; /* M: maximum page program time (us) */
159 	uint16_t param_t_bers; /* M: maximum block erase time (us) */
160 	uint16_t param_t_r;    /* M: maximum page read time (us) */
161 	uint16_t param_ccs;    /* M: minimum change column setup time (ns) */
162 	uint16_t param_sync_timing_mode; /* source sync timing mode support */
163 	uint8_t param_sync_features;     /* M: source sync features */
164 	uint16_t param_clk_input_c;   /* O: CLK input pin cap., typical */
165 	uint16_t param_io_c;	    /* O: I/O pin capacitance, typical */
166 	uint16_t param_input_c;	    /* O: input pin capacitance, typical */
167 	uint8_t param_input_c_max;    /* M: input pin capacitance, maximum */
168 	uint8_t param_driver_strength; /* M: driver strength support */
169 	uint16_t param_t_r_interleaved; /* O: maximum interleaved
171 	uint16_t param_t_adl;	/* O: program page register clear enhancement
173 	uint8_t param_reserved_5[8]; /* R: reserved */
175 	uint16_t param_vendor_revision; /* M: vendor specific rev number */
176 	uint8_t param_vendor_specific[88]; /* vendor specific information */
177 	uint16_t param_integrity_crc;	 /* M: integrity CRC */