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1 /* $NetBSD: miidevs.h,v 1.172 2024/10/23 05:46:51 skrll Exp $ */
7 * NetBSD: miidevs,v 1.174 2024/10/23 05:44:10 skrll Exp
142 #define MII_MODEL_AGERE_ET1011 0x0001 /* ET1011 10/100/1000baseT PHY */
143 #define MII_STR_AGERE_ET1011 "ET1011 10/100/1000baseT PHY"
144 #define MII_MODEL_AGERE_ET1011C 0x0004 /* ET1011C 10/100/1000baseT PHY */
145 #define MII_STR_AGERE_ET1011C "ET1011C 10/100/1000baseT PHY"
159 #define MII_MODEL_ALTIMA_ACXXX 0x0001 /* ACXXX 10/100 media interface */
160 #define MII_STR_ALTIMA_ACXXX "ACXXX 10/100 media interface"
161 #define MII_MODEL_ALTIMA_AC101L 0x0012 /* AC101L 10/100 media interface */
162 #define MII_STR_ALTIMA_AC101L "AC101L 10/100 media interface"
163 #define MII_MODEL_ALTIMA_AC101 0x0021 /* AC101 10/100 media interface */
164 #define MII_STR_ALTIMA_AC101 "AC101 10/100 media interface"
166 #define MII_MODEL_ALTIMA_Am79C875 0x0014 /* Am79C875 10/100 media interface */
167 #define MII_STR_ALTIMA_Am79C875 "Am79C875 10/100 media interface"
168 #define MII_MODEL_ALTIMA_Am79C874 0x0021 /* Am79C874 10/100 media interface */
169 #define MII_STR_ALTIMA_Am79C874 "Am79C874 10/100 media interface"
178 #define MII_MODEL_ATTANSIC_L1 0x0001 /* L1 10/100/1000 PHY */
179 #define MII_STR_ATTANSIC_L1 "L1 10/100/1000 PHY"
180 #define MII_MODEL_ATTANSIC_L2 0x0002 /* L2 10/100 PHY */
181 #define MII_STR_ATTANSIC_L2 "L2 10/100 PHY"
182 #define MII_MODEL_ATTANSIC_AR8021 0x0004 /* Atheros AR8021 10/100/1000 PHY */
183 #define MII_STR_ATTANSIC_AR8021 "Atheros AR8021 10/100/1000 PHY"
184 #define MII_MODEL_ATTANSIC_AR8035 0x0007 /* Atheros AR8035 10/100/1000 PHY */
185 #define MII_STR_ATTANSIC_AR8035 "Atheros AR8035 10/100/1000 PHY"
189 #define MII_MODEL_yyAMD_79C972_10T 0x0001 /* Am79C972 internal 10BASE-T interface */
190 #define MII_STR_yyAMD_79C972_10T "Am79C972 internal 10BASE-T interface"
191 #define MII_MODEL_yyAMD_79c973phy 0x0036 /* Am79C973 internal 10/100 media interface */
192 #define MII_STR_yyAMD_79c973phy "Am79C973 internal 10/100 media interface"
193 #define MII_MODEL_yyAMD_79c901 0x0037 /* Am79C901 10BASE-T interface */
194 #define MII_STR_yyAMD_79c901 "Am79C901 10BASE-T interface"
203 #define MII_MODEL_xxBROADCOM_BCM5221 0x001e /* BCM5221 10/100 media interface */
204 #define MII_STR_xxBROADCOM_BCM5221 "BCM5221 10/100 media interface"
205 #define MII_MODEL_xxBROADCOM_BCM5201 0x0021 /* BCM5201 10/100 media interface */
206 #define MII_STR_xxBROADCOM_BCM5201 "BCM5201 10/100 media interface"
207 #define MII_MODEL_xxBROADCOM_BCM5214 0x0028 /* BCM5214 Quad 10/100 media interface */
208 #define MII_STR_xxBROADCOM_BCM5214 "BCM5214 Quad 10/100 media interface"
209 #define MII_MODEL_xxBROADCOM_BCM5222 0x0032 /* BCM5222 Dual 10/100 media interface */
210 #define MII_STR_xxBROADCOM_BCM5222 "BCM5222 Dual 10/100 media interface"
211 #define MII_MODEL_xxBROADCOM_BCM4401 0x0036 /* BCM4401 10/100 media interface */
212 #define MII_STR_xxBROADCOM_BCM4401 "BCM4401 10/100 media interface"
213 #define MII_MODEL_xxBROADCOM_BCM5365 0x0037 /* BCM5365 10/100 5-port PHY switch */
214 #define MII_STR_xxBROADCOM_BCM5365 "BCM5365 10/100 5-port PHY switch"
259 #define MII_MODEL_BROADCOM2_BCM5325 0x0003 /* BCM5325 10/100 5-port PHY switch */
260 #define MII_STR_BROADCOM2_BCM5325 "BCM5325 10/100 5-port PHY switch"
261 #define MII_MODEL_BROADCOM2_BCM5906 0x0004 /* BCM5906 10/100baseTX media interface */
262 #define MII_STR_BROADCOM2_BCM5906 "BCM5906 10/100baseTX media interface"
281 #define MII_MODEL_BROADCOM2_BCM5709CAX 0x002c /* BCM5709CAX 10/100/1000baseT PHY */
282 #define MII_STR_BROADCOM2_BCM5709CAX "BCM5709CAX 10/100/1000baseT PHY"
285 #define MII_MODEL_BROADCOM2_BCM5784 0x003a /* BCM5784 10/100/1000baseT PHY */
286 #define MII_STR_BROADCOM2_BCM5784 "BCM5784 10/100/1000baseT PHY"
287 #define MII_MODEL_BROADCOM2_BCM5709C 0x003c /* BCM5709 10/100/1000baseT PHY */
288 #define MII_STR_BROADCOM2_BCM5709C "BCM5709 10/100/1000baseT PHY"
289 #define MII_MODEL_BROADCOM2_BCM5761 0x003d /* BCM5761 10/100/1000baseT PHY */
290 #define MII_STR_BROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY"
309 #define MII_MODEL_xxBROADCOM_ALT1_BCM5906 0x0004 /* BCM5906 10/100baseTX media interface */
310 #define MII_STR_xxBROADCOM_ALT1_BCM5906 "BCM5906 10/100baseTX media interface"
314 #define MII_MODEL_xxCICADA_CIS8201 0x0001 /* Cicada CIS8201 10/100/1000TX PHY */
315 #define MII_STR_xxCICADA_CIS8201 "Cicada CIS8201 10/100/1000TX PHY"
316 #define MII_MODEL_xxCICADA_CIS8204 0x0004 /* Cicada CIS8204 10/100/1000TX PHY */
317 #define MII_STR_xxCICADA_CIS8204 "Cicada CIS8204 10/100/1000TX PHY"
318 #define MII_MODEL_xxCICADA_VSC8211 0x000b /* Cicada VSC8211 10/100/1000TX PHY */
319 #define MII_STR_xxCICADA_VSC8211 "Cicada VSC8211 10/100/1000TX PHY"
320 #define MII_MODEL_xxCICADA_VSC8221 0x0015 /* Vitesse VSC8221 10/100/1000BASE-T PHY */
321 #define MII_STR_xxCICADA_VSC8221 "Vitesse VSC8221 10/100/1000BASE-T PHY"
322 #define MII_MODEL_xxCICADA_VSC8224 0x0018 /* Vitesse VSC8224 10/100/1000BASE-T PHY */
323 #define MII_STR_xxCICADA_VSC8224 "Vitesse VSC8224 10/100/1000BASE-T PHY"
324 #define MII_MODEL_xxCICADA_CIS8201A 0x0020 /* Cicada CIS8201 10/100/1000TX PHY */
325 #define MII_STR_xxCICADA_CIS8201A "Cicada CIS8201 10/100/1000TX PHY"
326 #define MII_MODEL_xxCICADA_CIS8201B 0x0021 /* Cicada CIS8201 10/100/1000TX PHY */
327 #define MII_STR_xxCICADA_CIS8201B "Cicada CIS8201 10/100/1000TX PHY"
328 #define MII_MODEL_xxCICADA_VSC8234 0x0022 /* Vitesse VSC8234 10/100/1000TX PHY */
329 #define MII_STR_xxCICADA_VSC8234 "Vitesse VSC8234 10/100/1000TX PHY"
330 #define MII_MODEL_xxCICADA_VSC8244 0x002c /* Vitesse VSC8244 Quad 10/100/1000BASE-T PHY */
331 #define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
335 #define MII_MODEL_DAVICOM_DM9101 0x0000 /* DM9101 (AMD Am79C873) 10/100 media interface */
336 #define MII_STR_DAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
337 #define MII_MODEL_xxDAVICOM_DM9101 0x0000 /* DM9101 (AMD Am79C873) 10/100 media interface */
338 #define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
339 #define MII_MODEL_xxDAVICOM_DM9102 0x0004 /* DM9102 10/100 media interface */
340 #define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface"
341 #define MII_MODEL_xxDAVICOM_DM9161 0x0008 /* DM9161 10/100 media interface */
342 #define MII_STR_xxDAVICOM_DM9161 "DM9161 10/100 media interface"
343 #define MII_MODEL_xxDAVICOM_DM9161A 0x000a /* DM9161A 10/100 media interface */
344 #define MII_STR_xxDAVICOM_DM9161A "DM9161A 10/100 media interface"
345 #define MII_MODEL_xxDAVICOM_DM9161B 0x000b /* DM9161[BC] 10/100 media interface */
346 #define MII_STR_xxDAVICOM_DM9161B "DM9161[BC] 10/100 media interface"
347 #define MII_MODEL_xxDAVICOM_DM9601 0x000c /* DM9601 internal 10/100 media interface */
348 #define MII_STR_xxDAVICOM_DM9601 "DM9601 internal 10/100 media interface"
351 #define MII_MODEL_xxICPLUS_IP100 0x0004 /* IP100 10/100 PHY */
352 #define MII_STR_xxICPLUS_IP100 "IP100 10/100 PHY"
353 #define MII_MODEL_xxICPLUS_IP101 0x0005 /* IP101 10/100 PHY */
354 #define MII_STR_xxICPLUS_IP101 "IP101 10/100 PHY"
355 #define MII_MODEL_xxICPLUS_IP1000A 0x0008 /* IP1000A 10/100/1000 PHY */
356 #define MII_STR_xxICPLUS_IP1000A "IP1000A 10/100/1000 PHY"
357 #define MII_MODEL_xxICPLUS_IP1001 0x0019 /* IP1001 10/100/1000 PHY */
358 #define MII_STR_xxICPLUS_IP1001 "IP1001 10/100/1000 PHY"
361 #define MII_MODEL_ICS_1889 0x0001 /* ICS1889 10/100 media interface */
362 #define MII_STR_ICS_1889 "ICS1889 10/100 media interface"
363 #define MII_MODEL_ICS_1890 0x0002 /* ICS1890 10/100 media interface */
364 #define MII_STR_ICS_1890 "ICS1890 10/100 media interface"
365 #define MII_MODEL_ICS_1892 0x0003 /* ICS1892 10/100 media interface */
366 #define MII_STR_ICS_1892 "ICS1892 10/100 media interface"
367 #define MII_MODEL_ICS_1893 0x0004 /* ICS1893 10/100 media interface */
368 #define MII_STR_ICS_1893 "ICS1893 10/100 media interface"
369 #define MII_MODEL_ICS_1893C 0x0005 /* ICS1893C 10/100 media interface */
370 #define MII_STR_ICS_1893C "ICS1893C 10/100 media interface"
373 #define MII_MODEL_xxINTEL_I82553 0x0000 /* i82553 10/100 media interface */
374 #define MII_STR_xxINTEL_I82553 "i82553 10/100 media interface"
375 #define MII_MODEL_yyINTEL_I82555 0x0015 /* i82555 10/100 media interface */
376 #define MII_STR_yyINTEL_I82555 "i82555 10/100 media interface"
379 #define MII_MODEL_yyINTEL_I82562G 0x0031 /* i82562G 10/100 media interface */
380 #define MII_STR_yyINTEL_I82562G "i82562G 10/100 media interface"
381 #define MII_MODEL_yyINTEL_I82562EM 0x0032 /* i82562EM 10/100 media interface */
382 #define MII_STR_yyINTEL_I82562EM "i82562EM 10/100 media interface"
383 #define MII_MODEL_yyINTEL_I82562ET 0x0033 /* i82562ET 10/100 media interface */
384 #define MII_STR_yyINTEL_I82562ET "i82562ET 10/100 media interface"
385 #define MII_MODEL_yyINTEL_I82553 0x0035 /* i82553 10/100 media interface */
386 #define MII_STR_yyINTEL_I82553 "i82553 10/100 media interface"
389 #define MII_MODEL_yyINTEL_I82566 0x0039 /* i82566 10/100/1000 media interface */
390 #define MII_STR_yyINTEL_I82566 "i82566 10/100/1000 media interface"
391 #define MII_MODEL_INTEL_I82577 0x0005 /* i82577 10/100/1000 media interface */
392 #define MII_STR_INTEL_I82577 "i82577 10/100/1000 media interface"
393 #define MII_MODEL_INTEL_I82579 0x0009 /* i82579 10/100/1000 media interface */
394 #define MII_STR_INTEL_I82579 "i82579 10/100/1000 media interface"
395 #define MII_MODEL_INTEL_I217 0x000a /* i217 10/100/1000 media interface */
396 #define MII_STR_INTEL_I217 "i217 10/100/1000 media interface"
397 #define MII_MODEL_INTEL_X540 0x0020 /* X540 100M/1G/10G media interface */
398 #define MII_STR_INTEL_X540 "X540 100M/1G/10G media interface"
399 #define MII_MODEL_INTEL_X550 0x0022 /* X550 100M/1G/10G media interface */
400 #define MII_STR_INTEL_X550 "X550 100M/1G/10G media interface"
401 #define MII_MODEL_INTEL_X557 0x0024 /* X557 100M/1G/10G media interface */
402 #define MII_STR_INTEL_X557 "X557 100M/1G/10G media interface"
403 #define MII_MODEL_INTEL_I82580 0x003a /* 82580 10/100/1000 media interface */
404 #define MII_STR_INTEL_I82580 "82580 10/100/1000 media interface"
405 #define MII_MODEL_INTEL_I350 0x003b /* I350 10/100/1000 media interface */
406 #define MII_STR_INTEL_I350 "I350 10/100/1000 media interface"
407 #define MII_MODEL_xxMARVELL_I210 0x0000 /* I210 10/100/1000 media interface */
408 #define MII_STR_xxMARVELL_I210 "I210 10/100/1000 media interface"
409 #define MII_MODEL_xxMARVELL_I82563 0x000a /* i82563 10/100/1000 media interface */
410 #define MII_STR_xxMARVELL_I82563 "i82563 10/100/1000 media interface"
411 #define MII_MODEL_ATTANSIC_I82578 0x0004 /* Intel 82578 10/100/1000 media interface */
412 #define MII_STR_ATTANSIC_I82578 "Intel 82578 10/100/1000 media interface"
434 #define MII_MODEL_JMICRON_JMP211 0x0021 /* JMP211 10/100/1000 media interface */
435 #define MII_STR_JMICRON_JMP211 "JMP211 10/100/1000 media interface"
436 #define MII_MODEL_JMICRON_JMP202 0x0022 /* JMP202 10/100 media interface */
437 #define MII_STR_JMICRON_JMP202 "JMP202 10/100 media interface"
440 #define MII_MODEL_xxLEVEL1_LXT970 0x0000 /* LXT970 10/100 media interface */
441 #define MII_STR_xxLEVEL1_LXT970 "LXT970 10/100 media interface"
444 #define MII_MODEL_LEVEL1_LXT974 0x0004 /* LXT974 10/100 Quad PHY */
445 #define MII_STR_LEVEL1_LXT974 "LXT974 10/100 Quad PHY"
446 #define MII_MODEL_LEVEL1_LXT975 0x0005 /* LXT975 10/100 Quad PHY */
447 #define MII_STR_LEVEL1_LXT975 "LXT975 10/100 Quad PHY"
450 #define MII_MODEL_LEVEL1_LXT971 0x000e /* LXT971/2 10/100 media interface */
451 #define MII_STR_LEVEL1_LXT971 "LXT971/2 10/100 media interface"
452 #define MII_MODEL_LEVEL1_LXT973 0x0021 /* LXT973 10/100 Dual PHY */
453 #define MII_STR_LEVEL1_LXT973 "LXT973 10/100 Dual PHY"
468 #define MII_MODEL_xxMARVELL_E3082 0x0008 /* Marvell 88E3082 10/100 Fast Ethernet PHY */
469 #define MII_STR_xxMARVELL_E3082 "Marvell 88E3082 10/100 Fast Ethernet PHY"
478 #define MII_MODEL_xxMARVELL_E6060 0x0010 /* Marvell 88E6060 6-Port 10/100 Fast Ethernet Switch */
479 #define MII_STR_xxMARVELL_E6060 "Marvell 88E6060 6-Port 10/100 Fast Ethernet Switch"
496 #define MII_MODEL_xxMARVELL_E3016 0x0026 /* Marvell 88E3016 10/100 Fast Ethernet PHY */
497 #define MII_STR_xxMARVELL_E3016 "Marvell 88E3016 10/100 Fast Ethernet PHY"
518 #define MII_MODEL_MICREL_KSZ8041 0x0011 /* Micrel KSZ8041TL/FTL/MLL 10/100 PHY */
519 #define MII_STR_MICREL_KSZ8041 "Micrel KSZ8041TL/FTL/MLL 10/100 PHY"
520 #define MII_MODEL_MICREL_KSZ8041RNLI 0x0013 /* Micrel KSZ8041RNLI 10/100 PHY */
521 #define MII_STR_MICREL_KSZ8041RNLI "Micrel KSZ8041RNLI 10/100 PHY"
522 #define MII_MODEL_MICREL_KSZ8051 0x0015 /* Micrel KSZ80[235]1 10/100 PHY */
523 #define MII_STR_MICREL_KSZ8051 "Micrel KSZ80[235]1 10/100 PHY"
524 #define MII_MODEL_MICREL_KSZ8081 0x0016 /* Micrel KSZ80[89]1 10/100 PHY */
525 #define MII_STR_MICREL_KSZ8081 "Micrel KSZ80[89]1 10/100 PHY"
526 #define MII_MODEL_MICREL_KSZ8061 0x0017 /* Micrel KSZ8061 10/100 PHY */
527 #define MII_STR_MICREL_KSZ8061 "Micrel KSZ8061 10/100 PHY"
528 #define MII_MODEL_MICREL_KSZ9021_8001_8721 0x0021 /* Micrel KSZ9021 Gb & KSZ8001/8721 10/100 PHY */
529 #define MII_STR_MICREL_KSZ9021_8001_8721 "Micrel KSZ9021 Gb & KSZ8001/8721 10/100 PHY"
530 #define MII_MODEL_MICREL_KSZ9031 0x0022 /* Micrel KSZ9031 10/100/1000 PHY */
531 #define MII_STR_MICREL_KSZ9031 "Micrel KSZ9031 10/100/1000 PHY"
532 #define MII_MODEL_MICREL_KSZ9477 0x0023 /* Micrel KSZ9477 10/100/1000 PHY */
533 #define MII_STR_MICREL_KSZ9477 "Micrel KSZ9477 10/100/1000 PHY"
534 #define MII_MODEL_MICREL_KSZ9131 0x0024 /* Micrel KSZ9131 10/100/1000 PHY */
535 #define MII_STR_MICREL_KSZ9131 "Micrel KSZ9131 10/100/1000 PHY"
536 #define MII_MODEL_MICREL_KS8737 0x0032 /* Micrel KS8737 10/100 PHY */
537 #define MII_STR_MICREL_KS8737 "Micrel KS8737 10/100 PHY"
544 #define MII_MODEL_xxMYSON_MTD972 0x0000 /* MTD972 10/100 media interface */
545 #define MII_STR_xxMYSON_MTD972 "MTD972 10/100 media interface"
550 #define MII_MODEL_xxNATSEMI_DP83840 0x0000 /* DP83840 10/100 media interface */
551 #define MII_STR_xxNATSEMI_DP83840 "DP83840 10/100 media interface"
552 #define MII_MODEL_xxNATSEMI_DP83843 0x0001 /* DP83843 10/100 media interface */
553 #define MII_STR_xxNATSEMI_DP83843 "DP83843 10/100 media interface"
554 #define MII_MODEL_xxNATSEMI_DP83815 0x0002 /* DP83815/DP83846A 10/100 media interface */
555 #define MII_STR_xxNATSEMI_DP83815 "DP83815/DP83846A 10/100 media interface"
556 #define MII_MODEL_xxNATSEMI_DP83847 0x0003 /* DP83847 10/100 media interface */
557 #define MII_STR_xxNATSEMI_DP83847 "DP83847 10/100 media interface"
564 #define MII_MODEL_xxNATSEMI_DP83849 0x000a /* DP83849 10/100 media interface */
565 #define MII_STR_xxNATSEMI_DP83849 "DP83849 10/100 media interface"
578 #define MII_MODEL_xxQUALSEMI_QS6612 0x0000 /* QS6612 10/100 media interface */
579 #define MII_STR_xxQUALSEMI_QS6612 "QS6612 10/100 media interface"
582 #define MII_MODEL_xxRDC_R6040 0x0003 /* R6040 10/100 media interface */
583 #define MII_STR_xxRDC_R6040 "R6040 10/100 media interface"
584 #define MII_MODEL_xxRDC_R6040_2 0x0005 /* R6040 10/100 media interface */
585 #define MII_STR_xxRDC_R6040_2 "R6040 10/100 media interface"
586 #define MII_MODEL_xxRDC_R6040_3 0x0006 /* R6040 10/100 media interface */
587 #define MII_STR_xxRDC_R6040_3 "R6040 10/100 media interface"
592 #define MII_MODEL_yyREALTEK_RTL8201L 0x0020 /* RTL8201L 10/100 media interface */
593 #define MII_STR_yyREALTEK_RTL8201L "RTL8201L 10/100 media interface"
596 #define MII_MODEL_REALTEK_RTL8201E 0x0008 /* RTL8201E 10/100 media interface */
597 #define MII_STR_REALTEK_RTL8201E "RTL8201E 10/100 media interface"
602 #define MII_MODEL_SEEQ_80220 0x0003 /* Seeq 80220 10/100 media interface */
603 #define MII_STR_SEEQ_80220 "Seeq 80220 10/100 media interface"
604 #define MII_MODEL_SEEQ_84220 0x0004 /* Seeq 84220 10/100 media interface */
605 #define MII_STR_SEEQ_84220 "Seeq 84220 10/100 media interface"
606 #define MII_MODEL_SEEQ_80225 0x0008 /* Seeq 80225 10/100 media interface */
607 #define MII_STR_SEEQ_80225 "Seeq 80225 10/100 media interface"
610 #define MII_MODEL_SIS_900 0x0000 /* SiS 900 10/100 media interface */
611 #define MII_STR_SIS_900 "SiS 900 10/100 media interface"
614 #define MII_MODEL_SMSC_LAN83C185 0x000a /* SMSC LAN83C185 10/100 PHY */
615 #define MII_STR_SMSC_LAN83C185 "SMSC LAN83C185 10/100 PHY"
616 #define MII_MODEL_SMSC_LAN8700 0x000c /* SMSC LAN8700 10/100 Ethernet Transceiver */
617 #define MII_STR_SMSC_LAN8700 "SMSC LAN8700 10/100 Ethernet Transceiver"
618 #define MII_MODEL_SMSC_LAN911X 0x000d /* SMSC LAN911X internal 10/100 PHY */
619 #define MII_STR_SMSC_LAN911X "SMSC LAN911X internal 10/100 PHY"
620 #define MII_MODEL_SMSC_LAN75XX 0x000e /* SMSC LAN75XX internal 10/100 PHY */
621 #define MII_STR_SMSC_LAN75XX "SMSC LAN75XX internal 10/100 PHY"
622 #define MII_MODEL_SMSC_LAN8710_LAN8720 0x000f /* SMSC LAN8710/LAN8720 10/100 Ethernet Transceiver */
623 #define MII_STR_SMSC_LAN8710_LAN8720 "SMSC LAN8710/LAN8720 10/100 Ethernet Transceiver"
624 #define MII_MODEL_SMSC_LAN8740 0x0011 /* SMSC LAN8740 10/100 media interface */
625 #define MII_STR_SMSC_LAN8740 "SMSC LAN8740 10/100 media interface"
626 #define MII_MODEL_SMSC_LAN8741A 0x0012 /* SMSC LAN8741A 10/100 media interface */
627 #define MII_STR_SMSC_LAN8741A "SMSC LAN8741A 10/100 media interface"
628 #define MII_MODEL_SMSC_LAN8742 0x0013 /* SMSC LAN8742 10/100 media interface */
629 #define MII_STR_SMSC_LAN8742 "SMSC LAN8742 10/100 media interface"
632 #define MII_MODEL_TERANETICS_TN1010 0x0001 /* Teranetics TN1010 10GBase-T PHY */
633 #define MII_STR_TERANETICS_TN1010 "Teranetics TN1010 10GBase-T PHY"
636 #define MII_MODEL_TI_TLAN10T 0x0001 /* ThunderLAN 10BASE-T media interface */
637 #define MII_STR_TI_TLAN10T "ThunderLAN 10BASE-T media interface"
644 #define MII_MODEL_xxTSC_78Q2120 0x0014 /* 78Q2120 10/100 media interface */
645 #define MII_STR_xxTSC_78Q2120 "78Q2120 10/100 media interface"
650 #define MII_MODEL_xxVIA_VT6103 0x0032 /* VT6103 10/100 PHY */
651 #define MII_STR_xxVIA_VT6103 "VT6103 10/100 PHY"
652 #define MII_MODEL_xxVIA_VT6103_2 0x0034 /* VT6103 10/100 PHY */
653 #define MII_STR_xxVIA_VT6103_2 "VT6103 10/100 PHY"
656 #define MII_MODEL_xxVITESSE_VSC8601 0x0002 /* VSC8601 10/100/1000 PHY */
657 #define MII_STR_xxVITESSE_VSC8601 "VSC8601 10/100/1000 PHY"
658 #define MII_MODEL_xxVITESSE_VSC8641 0x0003 /* Vitesse VSC8641 10/100/1000TX PHY */
659 #define MII_STR_xxVITESSE_VSC8641 "Vitesse VSC8641 10/100/1000TX PHY"
660 #define MII_MODEL_xxVITESSE_VSC8504 0x000c /* Vitesse VSC8504 quad 10/100/1000TX PHY */
661 #define MII_STR_xxVITESSE_VSC8504 "Vitesse VSC8504 quad 10/100/1000TX PHY"
662 #define MII_MODEL_xxVITESSE_VSC8552 0x000e /* Vitesse VSC8552 dual 10/100/1000TX PHY */
663 #define MII_STR_xxVITESSE_VSC8552 "Vitesse VSC8552 dual 10/100/1000TX PHY"
664 #define MII_MODEL_xxVITESSE_VSC8502 0x0012 /* Vitesse VSC8502 dual 10/100/1000TX PHY */
665 #define MII_STR_xxVITESSE_VSC8502 "Vitesse VSC8502 dual 10/100/1000TX PHY"
666 #define MII_MODEL_xxVITESSE_VSC8501 0x0013 /* Vitesse VSC8501 10/100/1000TX PHY */
667 #define MII_STR_xxVITESSE_VSC8501 "Vitesse VSC8501 10/100/1000TX PHY"
668 #define MII_MODEL_xxVITESSE_VSC8531 0x0017 /* Vitesse VSC8531 10/100/1000TX PHY */
669 #define MII_STR_xxVITESSE_VSC8531 "Vitesse VSC8531 10/100/1000TX PHY"