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16 ; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 ; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
56 ; We use the various scratch[a-j] registers to keep internal status:
121 MOVE SCRATCHB0 & sem_done TO SFBR;
123 MOVE SCRATCHB0 | sem_start TO SCRATCHB0; we are there because the
126 MOVE 0x00 TO SCRATCHA1;
127 MOVE 0x00 TO SCRATCHC0;
128 MOVE 0xff TO SCRATCHE1;
129 ; a NOP by default; patched with MOVE GPREG | 0x01 to GPREG on compile-time
134 ; a NOP by default; patched with MOVE GPREG & 0xfe to GPREG on compile-time
138 MOVE SSID & 0x0f to SFBR;
139 MOVE SFBR to SCRATCHC1;
140 MOVE SCRATCHC0 | f_c_target to SCRATCHC0; save target
144 MOVE 0x0 to DSA1;
145 MOVE 0x0 to DSA2;
146 MOVE 0x0 to DSA3;
149 MOVE DSA0 + 0x00 to DSA0; host will patch 0x0 with base of table
150 MOVE DSA1 + 0x00 to DSA1 with carry;
151 MOVE DSA2 + 0x00 to DSA2 with carry;
152 MOVE DSA3 + 0x00 to DSA3 with carry; now dsa -> basetable + target * 4
157 MOVE SFBR & 0x07 to SCRATCHC2;
158 MOVE SCRATCHC0 | f_c_lun to SCRATCHC0; save LUN
163 MOVE DSA0 + SFBR TO DSA0;
164 MOVE DSA1 + 0x0 TO DSA1 with carry;
165 MOVE DSA2 + 0x0 TO DSA2 with carry;
166 MOVE DSA3 + 0x0 TO DSA3 with carry;
174 MOVE SFBR to SCRATCHA2;
175 MOVE SFBR to SCRATCHC3;
176 MOVE SCRATCHC0 | f_c_tag to SCRATCHC0; save TAG
177 CALL REL(restoredsa); switch to tag table DSA
178 MOVE 0x0 to SCRATCHA3;
183 MOVE SCRATCHA3 SHL SCRATCHA3; TAG * 4 to SCRATCHA(2,3)
184 MOVE SCRATCHA2 TO SFBR;
185 MOVE DSA0 + SFBR TO DSA0;
186 MOVE DSA1 + 0x00 TO DSA1 with CARRY;
187 MOVE DSA2 + 0x00 TO DSA2 with CARRY;
188 MOVE DSA3 + 0x00 TO DSA3 with CARRY;
189 MOVE SCRATCHA3 TO SFBR;
190 MOVE DSA1 + SFBR TO DSA1;
191 MOVE DSA2 + 0x00 TO DSA2 with CARRY;
192 MOVE DSA3 + 0x00 TO DSA3 with CARRY; SCRACHA(2,3) + DSA to DSA
208 MOVE SCRATCHA1 TO SFBR;
212 MOVE SCRATCHE1 to SFBR;
214 MOVE SCRATCHF0 to SFBR; load pointer in done ring
215 MOVE SFBR to DSA0;
216 MOVE SCRATCHF1 to SFBR;
217 MOVE SFBR to DSA1;
218 MOVE SCRATCHF2 to SFBR;
219 MOVE SFBR to DSA2;
220 MOVE SCRATCHF3 to SFBR;
221 MOVE SFBR to DSA3;
224 MOVE SCRATCHA0 to SFBR;
225 JUMP REL(wait_free), if not 0; wait for slot to be free
227 MOVE SCRATCHF0 + 4 to SCRATCHF0; advance to next slot
228 MOVE SCRATCHF1 + 0 to SCRATCHF1 with carry;
229 MOVE SCRATCHF2 + 0 to SCRATCHF2 with carry;
230 MOVE SCRATCHF3 + 0 to SCRATCHF3 with carry;
231 MOVE SCRATCHE2 + 1 to SCRATCHE2;
232 MOVE SCRATCHE2 to SFBR;
235 MOVE 0xff to SCRATCHF0; driver will change 0xff to base of ring
237 MOVE 0xff to SCRATCHF1;
239 MOVE 0xff to SCRATCHF2;
241 MOVE 0xff to SCRATCHF3;
242 MOVE 0 to SCRATCHE2;
245 MOVE SCRATCHB0 | sem_done TO SCRATCHB0;
251 MOVE CTEST2 & 0x40 TO SFBR;
254 MOVE SCRATCHD0 to SFBR;
255 MOVE SFBR to DSA0;
256 MOVE SCRATCHD1 to SFBR;
257 MOVE SFBR to DSA1;
258 MOVE SCRATCHD2 to SFBR;
259 MOVE SFBR to DSA2;
260 MOVE SCRATCHD3 to SFBR;
261 MOVE SFBR to DSA3;
263 MOVE DSA0 & f_cmd_free to SFBR; check flags
265 MOVE DSA0 & f_cmd_ignore to SFBR;
268 ; this slot is busy, attempt to exec command
272 ; waiting for a valid phase, so we have to do it now. If not a MSG_OUT phase,
276 MOVE SCRATCHD0 to SFBR; restore scheduler DSA
277 MOVE SFBR to DSA0;
278 MOVE SCRATCHD1 to SFBR;
279 MOVE SFBR to DSA1;
280 MOVE SCRATCHD2 to SFBR;
281 MOVE SFBR to DSA2;
282 MOVE SCRATCHD3 to SFBR;
283 MOVE SFBR to DSA3;
284 MOVE SCRATCHE0 + 1 to SCRATCHE0;
285 MOVE SCRATCHD0 + cmd_slot_size to SCRATCHD0;
286 MOVE SCRATCHD1 + 0 to SCRATCHD1 WITH CARRY;
287 MOVE SCRATCHD2 + 0 to SCRATCHD2 WITH CARRY;
288 MOVE SCRATCHD3 + 0 to SCRATCHD3 WITH CARRY;
289 MOVE SCRATCHE0 TO SFBR;
291 ; reset pointers to beginning of area
293 MOVE 0xff to SCRATCHD0; correct value will be patched by driver
295 MOVE 0xff to SCRATCHD1;
297 MOVE 0xff to SCRATCHD2;
299 MOVE 0xff to SCRATCHD3;
300 MOVE 0x00 to SCRATCHE0;
302 ; to avoid race condition we have to load the DSA value before setting the
303 ; free flag, so we have to use a temp register.
306 MOVE SCRATCHB0 | f_cmd_free to SCRATCHB0; mark slot as free
308 MOVE SCRATCHB0 & f_cmd_ignore to SFBR;
310 MOVE SCRATCHB0 & 0xfc to SCRATCHB0; clear f_cmd_*
311 CALL REL(restoredsa); and move SCRATCHB to DSA
313 MOVE SCRATCHB0 | sem_start TO SCRATCHB0;
316 ; a NOP by default; patched with MOVE GPREG & 0xfe to GPREG on compile-time
320 MOVE 0x00 TO SCRATCHA1;
321 MOVE 0xff TO SCRATCHE1;
334 MOVE SCRATCHC0 | f_c_sdp TO SCRATCHC0;
345 ; if we didn't get sdp, no need to interrupt
346 MOVE SCRATCHC0 & f_c_sdp TO SFBR;
349 MOVE SCRATCHA1 TO SFBR;
359 MOVE SFBR TO SCRATCHE1;
363 MOVE SCRATCHC0 | f_c_data TO SCRATCHC0;
366 MOVE SCRATCHA1 + 1 TO SCRATCHA1 ; adjust offset
367 MOVE DSA0 + 8 to DSA0;
368 MOVE DSA1 + 0 to DSA1 WITH CARRY;
369 MOVE DSA2 + 0 to DSA2 WITH CARRY;
370 MOVE DSA3 + 0 to DSA3 WITH CARRY;
373 MOVE SCRATCHC0 & f_c_data_mask TO SCRATCHC0;
378 MOVE SCRATCHC0 | f_c_data TO SCRATCHC0;
381 MOVE SCRATCHA1 + 1 TO SCRATCHA1 ; adjust offset
382 MOVE DSA0 + 8 to DSA0;
383 MOVE DSA1 + 0 to DSA1 WITH CARRY;
384 MOVE DSA2 + 0 to DSA2 WITH CARRY;
385 MOVE DSA3 + 0 to DSA3 WITH CARRY;
388 MOVE SCRATCHC0 & f_c_data_mask TO SCRATCHC0;
392 MOVE DSA0 to SFBR;
393 MOVE SFBR to SCRATCHB0;
394 MOVE DSA1 to SFBR;
395 MOVE SFBR to SCRATCHB1;
396 MOVE DSA2 to SFBR;
397 MOVE SFBR to SCRATCHB2;
398 MOVE DSA3 to SFBR;
399 MOVE SFBR to SCRATCHB3;
403 MOVE SCRATCHB0 TO SFBR;
404 MOVE SFBR TO DSA0;
405 MOVE SCRATCHB1 TO SFBR;
406 MOVE SFBR TO DSA1;
407 MOVE SCRATCHB2 TO SFBR;
408 MOVE SFBR TO DSA2;
409 MOVE SCRATCHB3 TO SFBR;
410 MOVE SFBR TO DSA3;
414 MOVE SCNTL2 & 0x7f TO SCNTL2;
430 MOVE GPREG & 0xfe TO GPREG;
433 MOVE GPREG | 0x01 TO GPREG;