2250 njsc32_end_auto(struct njsc32_softc *sc, struct njsc32_cmd *cmd, int auto_phase)  in njsc32_end_auto()  argument
2254 	if (auto_phase & NJSC32_XPHASE_MSGIN_02) {  in njsc32_end_auto()
2261 		if ((auto_phase & NJSC32_XPHASE_MSGIN_00) == 0 &&  in njsc32_end_auto()
2262 		    (auto_phase &  in njsc32_end_auto()
2275 	if (auto_phase & NJSC32_XPHASE_MSGIN_00) {  in njsc32_end_auto()
2290 	} else if (auto_phase & NJSC32_XPHASE_MSGIN_04) {  in njsc32_end_auto()
2340 	int auto_phase;  in njsc32_intr()  local
2505 		auto_phase = njsc32_read_2(sc, NJSC32_REG_EXECUTE_PHASE);  in njsc32_intr()
2507 		    device_xname(sc->sc_dev), auto_phase));  in njsc32_intr()
2510 		if (auto_phase & NJSC32_XPHASE_SEL_TIMEOUT) {  in njsc32_intr()
2527 		if (auto_phase & NJSC32_XPHASE_COMMAND) {  in njsc32_intr()
2534 		if (auto_phase & NJSC32_XPHASE_ILLEGAL) {  in njsc32_intr()
2540 		if (auto_phase & NJSC32_XPHASE_PAUSED_MSG_IN) {  in njsc32_intr()
2546 		if (auto_phase & NJSC32_XPHASE_PAUSED_MSG_OUT) {  in njsc32_intr()
2559 		if (auto_phase &  in njsc32_intr()
2564 			if (auto_phase & NJSC32_XPHASE_DATA_IN)  in njsc32_intr()
2566 			if (auto_phase & NJSC32_XPHASE_DATA_OUT)  in njsc32_intr()
2589 				if (auto_phase & NJSC32_XPHASE_BUS_FREE) {  in njsc32_intr()
2650 		if (auto_phase & NJSC32_XPHASE_MSGOUT) {  in njsc32_intr()
2653 			if ((auto_phase & NJSC32_XPHASE_PAUSED_MSG_IN) == 0 &&  in njsc32_intr()
2659 		if (auto_phase & NJSC32_XPHASE_STATUS) {  in njsc32_intr()
2667 		if (auto_phase & NJSC32_XPHASE_BUS_FREE) {  in njsc32_intr()
2675 			njsc32_end_auto(sc, cmd, auto_phase);  in njsc32_intr()