Lines Matching defs:fdc
119 #include "fdc.h"
121 #error "fdc but no fd?"
191 CFATTACH_DECL_NEW(fdc, sizeof(struct fdc_softc),
338 #define FD_SET_SWINTR() softint_schedule(fdc->sc_si);
355 #define FCR_REG_SYNC() (*fdc->sc_reg_fcr = fdc->sc_fcr)
379 * the drive). If `fdc' is not NULL, the drive was found but was not
385 fdprint(void *aux, const char *fdc)
389 if (fdc == NULL)
395 fdconf(struct fdc_softc *fdc)
399 if (out_fdc(fdc, NE7CMD_DUMPREG) || fdcresult(fdc) != 10)
406 if ((vroom = fdc->sc_status[7]) == 0)
410 out_fdc(fdc, NE7CMD_CFG);
411 out_fdc(fdc, vroom);
412 out_fdc(fdc, fdc->sc_cfg);
413 out_fdc(fdc, 0); /* PRETRK */
421 struct fdc_softc *fdc = device_private(self);
426 fdc->sc_dev = self;
428 fdc->sc_reg = (void *)bus_mapin(ca->ca_bustype, ca->ca_paddr,
431 callout_init(&fdc->sc_timo_ch, 0);
432 callout_init(&fdc->sc_intr_ch, 0);
434 fdc->sc_state = DEVIDLE;
435 fdc->sc_istate = ISTATE_IDLE;
436 fdc->sc_flags |= FDC_EIS;
437 TAILQ_INIT(&fdc->sc_drives);
443 panic("no 82077 fdc in this kernel");
446 fdc->sc_reg_msr = &((struct fdreg_72 *)fdc->sc_reg)->fd_msr;
447 fdc->sc_reg_fifo = &((struct fdreg_72 *)fdc->sc_reg)->fd_fifo;
449 fdc->sc_reg_fcr = ((volatile uint8_t *)fdc->sc_reg)
451 fdc->sc_reg_fvr = ((volatile uint8_t *)fdc->sc_reg)
460 isr_add_autovect(fdchwintr, fdc, pri);
463 isr_add_vectored(fdchwintr, fdc, pri, vec);
465 *fdc->sc_reg_fvr = vec; /* Program controller w/ interrupt vector */
467 fdc->sc_si = softint_establish(SOFTINT_BIO, fdcswintr, fdc);
475 if (out_fdc(fdc, NE7CMD_VERSION) == 0 &&
476 fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x90) {
482 fdc_reset(fdc);
487 fdc->sc_cfg = CFG_EIS|/*CFG_EFIFO|*/CFG_POLL|(8 & CFG_THRHLD_MASK);
488 fdconf(fdc);
490 evcnt_attach_dynamic(&fdc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
504 struct fdc_softc *fdc = device_private(parent);
514 fdc->sc_fcr |= FCR_DSEL(drive) | FCR_MTRON;
519 fdc->sc_nstat = 0;
520 out_fdc(fdc, NE7CMD_RECAL);
521 out_fdc(fdc, drive);
525 if ((*fdc->sc_reg_msr & (NE7_RQM|NE7_DIO|NE7_CB)) == NE7_RQM) {
528 if (out_fdc(fdc, NE7CMD_SENSEI))
530 if (fdcresult(fdc) == 1 && fdc->sc_status[0] == 0x80)
540 n = fdc->sc_nstat;
546 aprint_debug(" %x", fdc->sc_status[i]);
550 ok = (n == 2 && (fdc->sc_status[0] & 0xf8) == 0x20) ? 1 : 0;
553 fdc->sc_fcr &= ~(FCR_DSEL(drive)|FCR_MTRON);
565 struct fdc_softc *fdc = device_private(parent);
588 fdc->sc_fd[drive] = fd;
605 printf("fdc: specify command failed.\n"); \
609 OUT_FDC(fdc, NE7CMD_SPECIFY);
610 OUT_FDC(fdc, type->steprate);
622 OUT_FDC(fdc, 6|1); /* XXX head load time == 6ms */
715 struct fdc_softc *fdc;
717 fdc = device_private(device_parent(fd->sc_dv));
718 if (fdc->sc_state == DEVIDLE) {
720 fdcstart(fdc);
735 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dv));
736 bool active = fdc->sc_drives.tqh_first != 0;
740 TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
744 fdcstart(fdc);
750 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dv));
761 TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
763 TAILQ_INSERT_TAIL(&fdc->sc_drives, fd, sc_drivechain);
773 fdc->sc_state = DEVIDLE;
777 fdc_reset(struct fdc_softc *fdc)
780 fdc->sc_fcr = 0;
783 *fdc->sc_reg_drs = DRS_RESET;
785 *fdc->sc_reg_drs = 0;
789 printf("fdc reset\n");
794 fd_set_motor(struct fdc_softc *fdc)
802 if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
805 fdc->sc_fcr |= FCR_DSEL(0)|FCR_MTRON; /* XXX */
807 fdc->sc_fcr &= ~(FCR_DSEL(0)|FCR_MTRON); /* XXX */
828 struct fdc_softc *fdc = device_private(device_parent(fd->sc_dv));
833 if ((TAILQ_FIRST(&fdc->sc_drives) == fd) &&
834 (fdc->sc_state == MOTORWAIT))
835 (void)fdcstate(fdc);
840 fdcresult(struct fdc_softc *fdc)
846 i = *fdc->sc_reg_msr & (NE7_DIO | NE7_RQM | NE7_CB);
848 fdc->sc_nstat = n;
852 if (n >= sizeof(fdc->sc_status)) {
856 fdc->sc_status[n++] = *fdc->sc_reg_fifo;
861 fdc->sc_nstat = -1;
866 out_fdc(struct fdc_softc *fdc, u_char x)
870 while (((*fdc->sc_reg_msr & (NE7_DIO|NE7_RQM)) != NE7_RQM) && i-- > 0)
875 *fdc->sc_reg_fifo = x;
964 fdcstart(struct fdc_softc *fdc)
970 if (fdc->sc_state != DEVIDLE) {
975 (void)fdcstate(fdc);
979 fdcpstatus(int n, struct fdc_softc *fdc)
988 snprintb(bits, sizeof(bits), NE7_ST0BITS, fdc->sc_status[0]);
989 printf(" (st0 %s cyl %d)\n", bits, fdc->sc_status[1]);
992 snprintb(bits, sizeof(bits), NE7_ST0BITS, fdc->sc_status[0]);
994 snprintb(bits, sizeof(bits), NE7_ST1BITS, fdc->sc_status[1]);
996 snprintb(bits, sizeof(bits), NE7_ST2BITS, fdc->sc_status[2]);
999 fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
1012 struct fdc_softc *fdc = device_private(device_parent(dv));
1018 if (n == 0 && (fdc->sc_flags & FDC_82077)) {
1019 out_fdc(fdc, NE7CMD_SENSEI);
1020 (void)fdcresult(fdc);
1026 n = fdc->sc_nstat;
1028 printf("%s: %s: state %d", device_xname(dv), s, fdc->sc_state);
1030 fdcpstatus(n, fdc);
1036 struct fdc_softc *fdc = arg;
1037 struct fd_softc *fd = TAILQ_FIRST(&fdc->sc_drives);
1044 fdc->sc_state++;
1046 fdc->sc_state = DEVIDLE;
1048 (void)fdcstate(fdc);
1055 struct fdc_softc *fdc = arg;
1060 (void)fdcstate(fdc);
1072 struct fdc_softc *fdc = arg;
1077 switch (fdc->sc_istate) {
1081 out_fdc(fdc, NE7CMD_SENSEI);
1082 fdcresult(fdc);
1083 fdc->sc_istate = ISTATE_DONE;
1089 log(LOG_ERR, "fdc: stray hard interrupt.\n");
1090 fdc->sc_fcr &= ~(FCR_DSEL(0)); /* Does this help? */
1091 fdc->sc_istate = ISTATE_SPURIOUS;
1099 msr = *fdc->sc_reg_msr;
1106 fdcresult(fdc);
1107 fdc->sc_istate = ISTATE_DONE;
1111 log(LOG_ERR, "fdc: overrun: tc = %d\n",
1112 fdc->sc_tc);
1118 *fdc->sc_data++ = *fdc->sc_reg_fifo;
1120 *fdc->sc_reg_fifo = *fdc->sc_data++;
1122 if (--fdc->sc_tc == 0) {
1123 fdc->sc_fcr |= FCR_TC;
1126 fdc->sc_fcr &= ~FCR_TC;
1137 struct fdc_softc *fdc = arg;
1140 if (fdc->sc_istate != ISTATE_DONE)
1143 fdc->sc_istate = ISTATE_IDLE;
1145 fdcstate(fdc);
1150 fdcstate(struct fdc_softc *fdc)
1152 #define st0 fdc->sc_status[0]
1153 #define st1 fdc->sc_status[1]
1154 #define cyl fdc->sc_status[1]
1155 #define OUT_FDC(fdc, c, s) \
1157 if (out_fdc(fdc, (c))) { \
1158 (fdc)->sc_state = (s); \
1170 if (fdc->sc_istate != ISTATE_IDLE) {
1172 printf("fdc: spurious interrupt: state %d, istate=%d\n",
1173 fdc->sc_state, fdc->sc_istate);
1174 fdc->sc_istate = ISTATE_IDLE;
1175 if (fdc->sc_state == RESETCOMPLETE ||
1176 fdc->sc_state == RESETTIMEDOUT) {
1185 fd = TAILQ_FIRST(&fdc->sc_drives);
1187 fdc->sc_state = DEVIDLE;
1195 TAILQ_REMOVE(&fdc->sc_drives, fd, sc_drivechain);
1203 switch (fdc->sc_state) {
1205 fdc->sc_errors = 0;
1211 fdc->sc_state = MOTORWAIT;
1216 struct fd_softc *ofd = fdc->sc_fd[fd->sc_drive ^ 1];
1222 fd_set_motor(fdc);
1223 fdc->sc_state = MOTORWAIT;
1224 if (fdc->sc_flags & FDC_82077) { /* XXX */
1235 fd_set_motor(fdc);
1240 if ((fdc->sc_flags & FDC_EIS) &&
1251 OUT_FDC(fdc, NE7CMD_SPECIFY, SEEKTIMEDOUT);
1252 OUT_FDC(fdc, fd->sc_type->steprate, SEEKTIMEDOUT);
1253 OUT_FDC(fdc, 6|1, SEEKTIMEDOUT); /* XXX head load time == 6ms */
1255 fdc->sc_istate = ISTATE_SENSEI;
1257 OUT_FDC(fdc, NE7CMD_SEEK, SEEKTIMEDOUT);
1258 OUT_FDC(fdc, fd->sc_drive, SEEKTIMEDOUT); /* drive number */
1259 OUT_FDC(fdc, bp->b_cylinder * fd->sc_type->step, SEEKTIMEDOUT);
1262 fdc->sc_state = SEEKWAIT;
1263 fdc->sc_nstat = 0;
1268 callout_reset(&fdc->sc_timo_ch, 4 * hz, fdctimeout, fdc);
1275 if (fdc->sc_reg_dir & FDI_DCHG) {
1304 device_xname(fdc->sc_dev), block,
1315 fdc->sc_data = (char *)bp->b_data + fd->sc_skip;
1316 fdc->sc_tc = fd->sc_nbytes;
1318 *fdc->sc_reg_drs = type->rate;
1326 fdc->sc_state = IOCOMPLETE;
1327 fdc->sc_istate = ISTATE_DMA;
1328 fdc->sc_nstat = 0;
1331 OUT_FDC(fdc, NE7CMD_FORMAT, IOTIMEDOUT);
1332 OUT_FDC(fdc, (head << 2) | fd->sc_drive, IOTIMEDOUT);
1333 OUT_FDC(fdc, finfo->fd_formb_secshift, IOTIMEDOUT);
1334 OUT_FDC(fdc, finfo->fd_formb_nsecs, IOTIMEDOUT);
1335 OUT_FDC(fdc, finfo->fd_formb_gaplen, IOTIMEDOUT);
1336 OUT_FDC(fdc, finfo->fd_formb_fillbyte, IOTIMEDOUT);
1339 OUT_FDC(fdc, NE7CMD_READ, IOTIMEDOUT);
1341 OUT_FDC(fdc, NE7CMD_WRITE, IOTIMEDOUT);
1342 OUT_FDC(fdc, (head << 2) | fd->sc_drive, IOTIMEDOUT);
1343 OUT_FDC(fdc, fd->sc_cylin, IOTIMEDOUT); /*track*/
1344 OUT_FDC(fdc, head, IOTIMEDOUT);
1345 OUT_FDC(fdc, sec + 1, IOTIMEDOUT); /*sector+1*/
1346 OUT_FDC(fdc, type->secsize, IOTIMEDOUT);/*sector size*/
1347 OUT_FDC(fdc, type->sectrac, IOTIMEDOUT);/*secs/track*/
1348 OUT_FDC(fdc, type->gap1, IOTIMEDOUT); /*gap1 size*/
1349 OUT_FDC(fdc, type->datalen, IOTIMEDOUT);/*data length*/
1355 callout_reset(&fdc->sc_timo_ch, 2 * hz, fdctimeout, fdc);
1359 callout_stop(&fdc->sc_timo_ch);
1360 fdc->sc_state = SEEKCOMPLETE;
1361 if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1363 callout_reset(&fdc->sc_intr_ch, hz / 50,
1364 fdcpseudointr, fdc);
1373 if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 ||
1379 fdcretry(fdc);
1386 fdc->sc_fcr |= FCR_TC;
1389 fdc->sc_fcr &= ~FCR_TC;
1391 (void)fdcresult(fdc);
1396 fdcretry(fdc);
1400 callout_stop(&fdc->sc_timo_ch);
1405 if (fdc->sc_nstat != 7 || (st0 & 0xf8) != 0 || st1 != 0) {
1413 fdc->sc_tc);
1416 if (fdc->sc_nstat == 7 &&
1423 int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1426 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1427 fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1430 printf("fdc: %d -> threshold\n",
1433 fdconf(fdc);
1434 fdc->sc_overruns = 0;
1436 if (++fdc->sc_overruns < 3) {
1437 fdc->sc_state = DOIO;
1441 fdcretry(fdc);
1444 if (fdc->sc_errors) {
1448 fdc->sc_errors = 0;
1450 if (--fdc->sc_overruns < -20) {
1451 int thr = fdc->sc_cfg & CFG_THRHLD_MASK;
1454 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1455 fdc->sc_cfg |= (thr & CFG_THRHLD_MASK);
1458 printf("fdc: %d -> threshold\n",
1461 fdconf(fdc);
1463 fdc->sc_overruns = 0;
1479 fd_set_motor(fdc);
1481 fdc_reset(fdc);
1482 fdc->sc_nstat = 0;
1483 fdc->sc_istate = ISTATE_SENSEI;
1484 fdc->sc_state = RESETCOMPLETE;
1485 callout_reset(&fdc->sc_timo_ch, hz / 2, fdctimeout, fdc);
1489 callout_stop(&fdc->sc_timo_ch);
1490 fdconf(fdc);
1494 fdc->sc_state = RECALWAIT;
1495 fdc->sc_istate = ISTATE_SENSEI;
1496 fdc->sc_nstat = 0;
1498 OUT_FDC(fdc, NE7CMD_RECAL, RECALTIMEDOUT);
1499 OUT_FDC(fdc, fd->sc_drive, RECALTIMEDOUT);
1500 callout_reset(&fdc->sc_timo_ch, 5 * hz, fdctimeout, fdc);
1504 callout_stop(&fdc->sc_timo_ch);
1505 fdc->sc_state = RECALCOMPLETE;
1506 if (fdc->sc_flags & FDC_NEEDHEADSETTLE) {
1508 callout_reset(&fdc->sc_intr_ch, hz / 30,
1509 fdcpseudointr, fdc);
1514 if (fdc->sc_nstat != 2 || (st0 & 0xf8) != 0x20 || cyl != 0) {
1519 fdcretry(fdc);
1543 fdcretry(struct fdc_softc *fdc)
1548 fd = fdc->sc_drives.tqh_first;
1551 fdc->sc_overruns = 0;
1555 switch (fdc->sc_errors) {
1558 fdc->sc_state =
1559 (fdc->sc_flags & FDC_EIS) ? DOIO : DOSEEK;
1566 fdc->sc_state = DORECAL;
1571 fdc->sc_state = DORESET;
1580 fdcpstatus(7, fdc);
1586 fdc->sc_errors++;
1775 struct fdc_softc *fdc =
1778 out_fdc(fdc, NE7CMD_DUMPREG);
1779 fdcresult(fdc);
1780 printf("dumpreg(%d regs): <", fdc->sc_nstat);
1781 for (k = 0; k < fdc->sc_nstat; k++)
1782 printf(" %x", fdc->sc_status[k]);
1789 struct fdc_softc *fdc =
1792 fdc->sc_cfg &= ~CFG_THRHLD_MASK;
1793 fdc->sc_cfg |= (*(int *)addr & CFG_THRHLD_MASK);
1794 fdconf(fdc);
1801 struct fdc_softc *fdc =
1804 out_fdc(fdc, NE7CMD_SENSEI);
1805 fdcresult(fdc);
1806 printf("sensei(%d regs): <", fdc->sc_nstat);
1807 for (k=0; k < fdc->sc_nstat; k++)
1808 printf(" 0x%x", fdc->sc_status[k]);
1929 fd_do_eject(struct fdc_softc *fdc, int unit)
1932 fdc->sc_fcr |= FCR_DSEL(unit)|FCR_EJECT;
1935 fdc->sc_fcr &= ~(FCR_DSEL(unit)|FCR_EJECT);
1948 struct fdc_softc *fdc;
1952 fdc = device_private(device_parent(dev));
1953 fd_do_eject(fdc, fd->sc_drive);
1978 struct fdc_softc *fdc;
2021 fdc = device_private(device_parent(fd->sc_dv));
2022 fd_do_eject(fdc, 0); /* XXX */