Lines Matching refs:devhandle

130 int64_t	hv_intr_devino_to_sysino(uint64_t devhandle, uint64_t devino,
148 int64_t	hv_vintr_getcookie(uint64_t devhandle, uint64_t devino,
150 int64_t	hv_vintr_setcookie(uint64_t devhandle, uint64_t devino,
152 int64_t	hv_vintr_getenabled(uint64_t devhandle, uint64_t devino,
154 int64_t	hv_vintr_setenabled(uint64_t devhandle, uint64_t devino,
156 int64_t	hv_vintr_getstate(uint64_t devhandle, uint64_t devino,
158 int64_t	hv_vintr_setstate(uint64_t devhandle, uint64_t devino,
160 int64_t	hv_vintr_gettarget(uint64_t devhandle, uint64_t devino,
162 int64_t	hv_vintr_settarget(uint64_t devhandle, uint64_t devino,
205 int64_t	hv_pci_iommu_map(uint64_t devhandle, uint64_t tsbid,
208 int64_t	hv_pci_iommu_demap(uint64_t devhandle, uint64_t tsbid,
210 int64_t	hv_pci_iommu_getmap(uint64_t devhandle, uint64_t tsbid,
212 int64_t	hv_pci_iommu_getbypass(uint64_t devhandle, paddr_t r_addr,
215 int64_t	hv_pci_config_get(uint64_t devhandle, uint64_t pci_device,
218 int64_t	hv_pci_config_put(uint64_t devhandle, uint64_t pci_device,
231 int64_t hv_pci_msiq_conf(uint64_t devhandle, uint64_t msiqid,
233 int64_t hv_pci_msiq_info(uint64_t devhandle, uint64_t msiqid,
236 int64_t hv_pci_msiq_getvalid(uint64_t devhandle, uint64_t msiqid,
238 int64_t hv_pci_msiq_setvalid(uint64_t devhandle, uint64_t msiqid,
246 int64_t hv_pci_msiq_getstate(uint64_t devhandle, uint64_t msiqid,
248 int64_t hv_pci_msiq_setstate(uint64_t devhandle, uint64_t msiqid,
256 int64_t hv_pci_msiq_gethead(uint64_t devhandle, uint64_t msiqid,
258 int64_t hv_pci_msiq_sethead(uint64_t devhandle, uint64_t msiqid,
260 int64_t hv_pci_msiq_gettail(uint64_t devhandle, uint64_t msiqid,
263 int64_t hv_pci_msi_getvalid(uint64_t devhandle, uint64_t msinum,
265 int64_t hv_pci_msi_setvalid(uint64_t devhandle, uint64_t msinum,
273 int64_t hv_pci_msi_getmsiq(uint64_t devhandle, uint64_t msinum,
275 int64_t hv_pci_msi_setmsiq(uint64_t devhandle, uint64_t msinum,
278 int64_t hv_pci_msi_getstate(uint64_t devhandle, uint64_t msinum,
280 int64_t hv_pci_msi_setstate(uint64_t devhandle, uint64_t msinum,
288 int64_t hv_pci_msg_getmsiq(uint64_t devhandle, uint64_t msg,
290 int64_t hv_pci_msg_setmsiq(uint64_t devhandle, uint64_t msg,
293 int64_t hv_pci_msg_getvalid(uint64_t devhandle, uint64_t msg,
295 int64_t hv_pci_msg_setvalid(uint64_t devhandle, uint64_t msg,